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| author | Vexu <git@vexu.eu> | 2020-03-11 12:02:05 +0200 |
|---|---|---|
| committer | Vexu <git@vexu.eu> | 2020-03-11 12:02:05 +0200 |
| commit | 1f66435a6b0c5ccf6e4e96df0ed96732480ab4db (patch) | |
| tree | c273dfcd75aed849d234e2f532e8507cd494bde8 /src/ir.cpp | |
| parent | 64e60d8ae2c06689a2e0533eb43a1c6a8ff01259 (diff) | |
| download | zig-1f66435a6b0c5ccf6e4e96df0ed96732480ab4db.tar.gz zig-1f66435a6b0c5ccf6e4e96df0ed96732480ab4db.zip | |
support cmpxchg at comptime
Diffstat (limited to 'src/ir.cpp')
| -rw-r--r-- | src/ir.cpp | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/src/ir.cpp b/src/ir.cpp index 2e87bd2687..338f803bbe 100644 --- a/src/ir.cpp +++ b/src/ir.cpp @@ -25212,7 +25212,20 @@ static IrInstGen *ir_analyze_instruction_cmpxchg(IrAnalyze *ira, IrInstSrcCmpxch if (instr_is_comptime(casted_ptr) && casted_ptr->value->data.x_ptr.mut != ConstPtrMutRuntimeVar && instr_is_comptime(casted_cmp_value) && instr_is_comptime(casted_new_value)) { - zig_panic("TODO compile-time execution of cmpxchg"); + IrInstGen *result = ir_get_deref(ira, &instruction->base.base, casted_ptr, nullptr); + ZigValue *op1_val = ir_resolve_const(ira, result, UndefBad); + ZigValue *op2_val = ir_resolve_const(ira, casted_cmp_value, UndefBad); + bool eql = const_values_equal(ira->codegen, op1_val, op2_val); + ZigValue *val = ira->codegen->pass1_arena->allocate<ZigValue>(1); + val->special = ConstValSpecialStatic; + val->type = result_type; + if (eql) { + ir_analyze_store_ptr(ira, &instruction->base.base, casted_ptr, casted_new_value, false); + set_optional_value_to_null(val); + } else { + set_optional_payload(val, op1_val); + } + return ir_const_move(ira, &instruction->base.base, val); } IrInstGen *result_loc; @@ -28334,7 +28347,6 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op, Zi int_type = operand_type; } auto bit_count = int_type->data.integral.bit_count; - bool is_signed = int_type->data.integral.is_signed; uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch); if (bit_count > max_atomic_bits) { @@ -28344,20 +28356,8 @@ static ZigType *ir_resolve_atomic_operand_type(IrAnalyze *ira, IrInstGen *op, Zi return ira->codegen->builtin_types.entry_invalid; } - if (bit_count < 2 || !is_power_of_2(bit_count)) { - if (bit_count < 8) { - *actual_type = get_int_type(ira->codegen, is_signed, 8); - } else if (bit_count < 16) { - *actual_type = get_int_type(ira->codegen, is_signed, 16); - } else if (bit_count < 32) { - *actual_type = get_int_type(ira->codegen, is_signed, 32); - } else if (bit_count < 64) { - *actual_type = get_int_type(ira->codegen, is_signed, 64); - } else if (bit_count < 128) { - *actual_type = get_int_type(ira->codegen, is_signed, 128); - } else { - zig_unreachable(); - } + if (bit_count == 1 || !is_power_of_2(bit_count)) { + *actual_type = get_int_type(ira->codegen, int_type->data.integral.is_signed, int_type->abi_size * 8); } } else if (operand_type->id == ZigTypeIdFloat) { uint32_t max_atomic_bits = target_arch_largest_atomic_bits(ira->codegen->zig_target->arch); |