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| author | Alex Rønne Petersen <alex@alexrp.com> | 2024-11-04 12:40:27 +0100 |
|---|---|---|
| committer | Alex Rønne Petersen <alex@alexrp.com> | 2024-11-04 13:53:20 +0100 |
| commit | 8a73a965d3185cadee2bd819daa12b5b3f1daafc (patch) | |
| tree | 1335bad7c1815691a90fa35cf7a72afe20bf8887 /src/codegen | |
| parent | 2307cf73b044527464e63aa315e3af343d6584ad (diff) | |
| download | zig-8a73a965d3185cadee2bd819daa12b5b3f1daafc.tar.gz zig-8a73a965d3185cadee2bd819daa12b5b3f1daafc.zip | |
llvm: Add client request support for all archs supported by Valgrind.
Diffstat (limited to 'src/codegen')
| -rw-r--r-- | src/codegen/llvm.zig | 82 |
1 files changed, 67 insertions, 15 deletions
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index b709403256..514a360a66 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -11595,29 +11595,81 @@ pub const FuncGen = struct { template: [:0]const u8, constraints: [:0]const u8, } = switch (target.cpu.arch) { - .x86 => .{ + .arm, .armeb, .thumb, .thumbeb => .{ .template = - \\roll $$3, %edi ; roll $$13, %edi - \\roll $$61, %edi ; roll $$51, %edi - \\xchgl %ebx,%ebx + \\ mov r12, r12, ror #3 ; mov r12, r12, ror #13 + \\ mov r12, r12, ror #29 ; mov r12, r12, ror #19 + \\ orr r10, r10, r10 , - .constraints = "={edx},{eax},0,~{cc},~{memory}", + .constraints = "={r3},{r4},{r3},~{cc},~{memory}", }, - .x86_64 => .{ + .aarch64, .aarch64_be => .{ .template = - \\rolq $$3, %rdi ; rolq $$13, %rdi - \\rolq $$61, %rdi ; rolq $$51, %rdi - \\xchgq %rbx,%rbx + \\ ror x12, x12, #3 ; ror x12, x12, #13 + \\ ror x12, x12, #51 ; ror x12, x12, #61 + \\ orr x10, x10, x10 , - .constraints = "={rdx},{rax},0,~{cc},~{memory}", + .constraints = "={x3},{x4},{x3},~{cc},~{memory}", }, - .aarch64, .aarch64_be => .{ + .mips, .mipsel => .{ + .template = + \\ srl $$0, $$0, 13 + \\ srl $$0, $$0, 29 + \\ srl $$0, $$0, 3 + \\ srl $$0, $$0, 19 + \\ or $$13, $$13, $$13 + , + .constraints = "={$11},{$12},{$11},~{memory}", + }, + .mips64, .mips64el => .{ + .template = + \\ dsll $$0, $$0, 3 ; dsll $$0, $$0, 13 + \\ dsll $$0, $$0, 29 ; dsll $$0, $$0, 19 + \\ or $$13, $$13, $$13 + , + .constraints = "={$11},{$12},{$11},~{memory}", + }, + .powerpc, .powerpcle => .{ + .template = + \\ rlwinm 0, 0, 3, 0, 31 ; rlwinm 0, 0, 13, 0, 31 + \\ rlwinm 0, 0, 29, 0, 31 ; rlwinm 0, 0, 19, 0, 31 + \\ or 1, 1, 1 + , + .constraints = "={r3},{r4},{r3},~{cc},~{memory}", + }, + .powerpc64, .powerpc64le => .{ + .template = + \\ rotldi 0, 0, 3 ; rotldi 0, 0, 13 + \\ rotldi 0, 0, 61 ; rotldi 0, 0, 51 + \\ or 1, 1, 1 + , + .constraints = "={r3},{r4},{r3},~{cc},~{memory}", + }, + .s390x => .{ + .template = + \\ lr %r15, %r15 + \\ lr %r1, %r1 + \\ lr %r2, %r2 + \\ lr %r3, %r3 + \\ lr %r2, %r2 + , + .constraints = "={r3},{r2},{r3},~{cc},~{memory}", + }, + .x86 => .{ + .template = + \\ roll $$3, %edi ; roll $$13, %edi + \\ roll $$61, %edi ; roll $$51, %edi + \\ xchgl %ebx, %ebx + , + .constraints = "={edx},{eax},{edx},~{cc},~{memory}", + }, + .x86_64 => .{ .template = - \\ror x12, x12, #3 ; ror x12, x12, #13 - \\ror x12, x12, #51 ; ror x12, x12, #61 - \\orr x10, x10, x10 + \\ rolq $$3, %rdi ; rolq $$13, %rdi + \\ rolq $$61, %rdi ; rolq $$51, %rdi + \\ xchgq %rbx, %rbx , - .constraints = "={x3},{x4},0,~{cc},~{memory}", + .constraints = "={rdx},{rax},{edx},~{cc},~{memory}", }, else => unreachable, }; |