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| author | Ali Cheraghi <alichraghi@proton.me> | 2025-05-07 15:03:42 +0330 |
|---|---|---|
| committer | Ali Cheraghi <alichraghi@proton.me> | 2025-05-21 12:57:40 +0330 |
| commit | 0901328f12e7ea3d05dc1d5b4a588e595c4bc0bc (patch) | |
| tree | 79320b4a4b280636ec5ff0d85d1bf2414c64a0e3 /src/codegen/spirv/Module.zig | |
| parent | fca5f3602d697bd3de6a36d4504703693133144c (diff) | |
| download | zig-0901328f12e7ea3d05dc1d5b4a588e595c4bc0bc.tar.gz zig-0901328f12e7ea3d05dc1d5b4a588e595c4bc0bc.zip | |
spirv: write error value in an storage buffer
Diffstat (limited to 'src/codegen/spirv/Module.zig')
| -rw-r--r-- | src/codegen/spirv/Module.zig | 26 |
1 files changed, 14 insertions, 12 deletions
diff --git a/src/codegen/spirv/Module.zig b/src/codegen/spirv/Module.zig index 8f69276e1e..16c32c26d5 100644 --- a/src/codegen/spirv/Module.zig +++ b/src/codegen/spirv/Module.zig @@ -350,6 +350,11 @@ pub fn finalize(self: *Module, a: Allocator) ![]Word { .vector16 => try self.addCapability(.Vector16), // Shader .shader => try self.addCapability(.Shader), + .variable_pointers => { + try self.addExtension("SPV_KHR_variable_pointers"); + try self.addCapability(.VariablePointersStorageBuffer); + try self.addCapability(.VariablePointers); + }, .physical_storage_buffer => { try self.addExtension("SPV_KHR_physical_storage_buffer"); try self.addCapability(.PhysicalStorageBufferAddresses); @@ -364,20 +369,17 @@ pub fn finalize(self: *Module, a: Allocator) ![]Word { // Emit memory model const addressing_model: spec.AddressingModel = blk: { if (self.hasFeature(.shader)) { - break :blk switch (self.target.cpu.arch) { - .spirv32 => .Logical, // TODO: I don't think this will ever be implemented. - .spirv64 => .PhysicalStorageBuffer64, - else => unreachable, - }; - } else if (self.hasFeature(.kernel)) { - break :blk switch (self.target.cpu.arch) { - .spirv32 => .Physical32, - .spirv64 => .Physical64, - else => unreachable, - }; + assert(self.target.cpu.arch == .spirv64); + if (self.hasFeature(.physical_storage_buffer)) break :blk .PhysicalStorageBuffer64; + break :blk .Logical; } - unreachable; + assert(self.hasFeature(.kernel)); + break :blk switch (self.target.cpu.arch) { + .spirv32 => .Physical32, + .spirv64 => .Physical64, + else => unreachable, + }; }; try self.sections.memory_model.emit(self.gpa, .OpMemoryModel, .{ .addressing_model = addressing_model, |
