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| author | Andrew Kelley <andrew@ziglang.org> | 2021-09-21 22:33:00 -0700 |
|---|---|---|
| committer | Andrew Kelley <andrew@ziglang.org> | 2021-09-21 23:21:07 -0700 |
| commit | aecebf38acc8835db21eeea7b53e4ee26ec739a8 (patch) | |
| tree | 132a3982487ae7bb1a0210a4ff2b7cd7a2934855 /src/codegen.zig | |
| parent | 0e2b9ac7770df07212d4d1cbfb15c3aaed0bef18 (diff) | |
| download | zig-aecebf38acc8835db21eeea7b53e4ee26ec739a8.tar.gz zig-aecebf38acc8835db21eeea7b53e4ee26ec739a8.zip | |
stage2: progress towards ability to compile compiler-rt
* prepare compiler-rt to support being compiled by stage2
- put in a few minor workarounds that will be removed later, such as
using `builtin.stage2_arch` rather than `builtin.cpu.arch`.
- only try to export a few symbols for now - we'll move more symbols
over to the "working in stage2" section as they become functional
and gain test coverage.
- use `inline fn` at function declarations rather than `@call` with an
always_inline modifier at the callsites, to avoid depending on the
anonymous array literal syntax language feature (for now).
* AIR: replace floatcast instruction with fptrunc and fpext for
shortening and widening floating point values, respectively.
* Introduce a new ZIR instruction, `export_value`, which implements
`@export` for the case when the thing to be exported is a local
comptime value that points to a function.
- AstGen: fix `@export` not properly reporting ambiguous decl
references.
* Sema: handle ExportOptions linkage. The value is now available to all
backends.
- Implement setting global linkage as appropriate in the LLVM
backend. I did not yet inspect the LLVM IR, so this still needs to
be audited. There is already a pending task to make sure the alias
stuff is working as intended, and this is related.
- Sema almost handles section, just a tiny bit more code is needed in
`resolveExportOptions`.
* Sema: implement float widening and shortening for both `@floatCast`
and float coercion.
- Implement the LLVM backend code for this as well.
Diffstat (limited to 'src/codegen.zig')
| -rw-r--r-- | src/codegen.zig | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/src/codegen.zig b/src/codegen.zig index 54c1400211..06b520c9dd 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -859,7 +859,8 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { .call => try self.airCall(inst), .cond_br => try self.airCondBr(inst), .dbg_stmt => try self.airDbgStmt(inst), - .floatcast => try self.airFloatCast(inst), + .fptrunc => try self.airFptrunc(inst), + .fpext => try self.airFpext(inst), .intcast => try self.airIntCast(inst), .trunc => try self.airTrunc(inst), .bool_to_int => try self.airBoolToInt(inst), @@ -1172,10 +1173,18 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { return self.finishAir(inst, .{ .ptr_stack_offset = stack_offset }, .{ .none, .none, .none }); } - fn airFloatCast(self: *Self, inst: Air.Inst.Index) !void { + fn airFptrunc(self: *Self, inst: Air.Inst.Index) !void { const ty_op = self.air.instructions.items(.data)[inst].ty_op; const result: MCValue = if (self.liveness.isUnused(inst)) .dead else switch (arch) { - else => return self.fail("TODO implement floatCast for {}", .{self.target.cpu.arch}), + else => return self.fail("TODO implement airFptrunc for {}", .{self.target.cpu.arch}), + }; + return self.finishAir(inst, result, .{ ty_op.operand, .none, .none }); + } + + fn airFpext(self: *Self, inst: Air.Inst.Index) !void { + const ty_op = self.air.instructions.items(.data)[inst].ty_op; + const result: MCValue = if (self.liveness.isUnused(inst)) .dead else switch (arch) { + else => return self.fail("TODO implement airFpext for {}", .{self.target.cpu.arch}), }; return self.finishAir(inst, result, .{ ty_op.operand, .none, .none }); } |
