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authorAndrew Kelley <andrew@ziglang.org>2021-02-24 21:54:23 -0700
committerAndrew Kelley <andrew@ziglang.org>2021-02-24 21:54:23 -0700
commit449f4de3825d3448c2aa0cda79c1a567adb08b59 (patch)
treeec2c79770135e854560743c489aa4b5eea7554ac /src/codegen.zig
parent9b8a94265ab7313f07b300ddc349a60c85d556d1 (diff)
downloadzig-449f4de3825d3448c2aa0cda79c1a567adb08b59.tar.gz
zig-449f4de3825d3448c2aa0cda79c1a567adb08b59.zip
zig fmt src/
Diffstat (limited to 'src/codegen.zig')
-rw-r--r--src/codegen.zig3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/codegen.zig b/src/codegen.zig
index 779366cc23..69c7789462 100644
--- a/src/codegen.zig
+++ b/src/codegen.zig
@@ -2950,8 +2950,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
4, 8 => {
const offset = if (math.cast(i9, adj_off)) |imm|
Instruction.LoadStoreOffset.imm_post_index(-imm)
- else |_|
- Instruction.LoadStoreOffset.reg(try self.copyToTmpRegister(src, Type.initTag(.u64), MCValue{ .immediate = adj_off }));
+ else |_| Instruction.LoadStoreOffset.reg(try self.copyToTmpRegister(src, Type.initTag(.u64), MCValue{ .immediate = adj_off }));
const rn: Register = switch (arch) {
.aarch64, .aarch64_be => .x29,
.aarch64_32 => .w29,