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| author | joachimschmidt557 <joachim.schmidt557@outlook.com> | 2021-03-27 17:24:51 +0100 |
|---|---|---|
| committer | Andrew Kelley <andrew@ziglang.org> | 2021-04-02 12:01:52 -0700 |
| commit | 228a1ce3e8d112a7710fa47c6b9486cf320b5d6f (patch) | |
| tree | da0f2e4089b1b04d408786dedf708058a01bd712 /src/codegen.zig | |
| parent | 4efbcad26d088a0b40cae308ca2990a71ea1f3f9 (diff) | |
| download | zig-228a1ce3e8d112a7710fa47c6b9486cf320b5d6f.tar.gz zig-228a1ce3e8d112a7710fa47c6b9486cf320b5d6f.zip | |
stage2 register_manager: Add unit tests for tryAllocReg and allocReg
Diffstat (limited to 'src/codegen.zig')
| -rw-r--r-- | src/codegen.zig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/codegen.zig b/src/codegen.zig index d5282e2797..beb3540d37 100644 --- a/src/codegen.zig +++ b/src/codegen.zig @@ -929,7 +929,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type { return MCValue{ .stack_offset = stack_offset }; } - pub fn spillInstruction(self: *Self, src: usize, reg: Register, inst: *ir.Inst) !void { + pub fn spillInstruction(self: *Self, src: LazySrcLoc, reg: Register, inst: *ir.Inst) !void { const stack_mcv = try self.allocRegOrMem(inst, false); const reg_mcv = self.getResolvedInstValue(inst); assert(reg == toCanonicalReg(reg_mcv.register)); |