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authorAndrew Kelley <andrew@ziglang.org>2020-02-19 18:12:06 -0500
committerAndrew Kelley <andrew@ziglang.org>2020-02-19 18:12:06 -0500
commit4c6f207aff482cf973218bbda1d28e6d2a619df5 (patch)
tree1b071512502cdbff6d1e3aa50fc28f2da4e3dae9 /src/codegen.cpp
parentc664692bdd62765ab444a79a8704d2161c1809f1 (diff)
downloadzig-4c6f207aff482cf973218bbda1d28e6d2a619df5.tar.gz
zig-4c6f207aff482cf973218bbda1d28e6d2a619df5.zip
clean up arm CPU features
* remove "cpu features" that are actually just processors * rename `v8` to `v8a`. this matches the corresponding change to target/aarch64.zig * rename types in preparation for removing sub-architecture from `std.Target`. I have other files changed in my dirty working tree, but about to make some changes to arm.zig that I don't want batched with this commit.
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