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authorVexu <git@vexu.eu>2019-12-17 00:28:17 +0200
committerVexu <git@vexu.eu>2019-12-23 11:54:47 +0200
commit8bb1e0444951b7b83254277c52534c7ab58fd135 (patch)
treec334c30c388ba0920b92c06e1ca939582a9cd1d7 /src/codegen.cpp
parent25e71216c4640a3d88c8f63912ea574ad6fa004c (diff)
downloadzig-8bb1e0444951b7b83254277c52534c7ab58fd135.tar.gz
zig-8bb1e0444951b7b83254277c52534c7ab58fd135.zip
support some atomic operations with floats
Diffstat (limited to 'src/codegen.cpp')
-rw-r--r--src/codegen.cpp12
1 files changed, 7 insertions, 5 deletions
diff --git a/src/codegen.cpp b/src/codegen.cpp
index 1455b4b743..cd4b4320fa 100644
--- a/src/codegen.cpp
+++ b/src/codegen.cpp
@@ -5129,11 +5129,13 @@ static LLVMAtomicOrdering to_LLVMAtomicOrdering(AtomicOrder atomic_order) {
zig_unreachable();
}
-static LLVMAtomicRMWBinOp to_LLVMAtomicRMWBinOp(AtomicRmwOp op, bool is_signed) {
+static LLVMAtomicRMWBinOp to_LLVMAtomicRMWBinOp(AtomicRmwOp op, bool is_signed, bool is_float) {
switch (op) {
case AtomicRmwOp_xchg: return LLVMAtomicRMWBinOpXchg;
- case AtomicRmwOp_add: return LLVMAtomicRMWBinOpAdd;
- case AtomicRmwOp_sub: return LLVMAtomicRMWBinOpSub;
+ case AtomicRmwOp_add:
+ return is_float ? LLVMAtomicRMWBinOpFAdd: LLVMAtomicRMWBinOpAdd;
+ case AtomicRmwOp_sub:
+ return is_float ? LLVMAtomicRMWBinOpFSub: LLVMAtomicRMWBinOpSub;
case AtomicRmwOp_and: return LLVMAtomicRMWBinOpAnd;
case AtomicRmwOp_nand: return LLVMAtomicRMWBinOpNand;
case AtomicRmwOp_or: return LLVMAtomicRMWBinOpOr;
@@ -5725,14 +5727,14 @@ static LLVMValueRef ir_render_panic(CodeGen *g, IrExecutable *executable, IrInst
static LLVMValueRef ir_render_atomic_rmw(CodeGen *g, IrExecutable *executable,
IrInstructionAtomicRmw *instruction)
{
- bool is_signed;
ZigType *operand_type = instruction->operand->value->type;
+ bool is_float = operand_type->id == ZigTypeIdFloat;
if (operand_type->id == ZigTypeIdInt) {
is_signed = operand_type->data.integral.is_signed;
} else {
is_signed = false;
}
- LLVMAtomicRMWBinOp op = to_LLVMAtomicRMWBinOp(instruction->resolved_op, is_signed);
+ LLVMAtomicRMWBinOp op = to_LLVMAtomicRMWBinOp(instruction->resolved_op, is_signed, is_float);
LLVMAtomicOrdering ordering = to_LLVMAtomicOrdering(instruction->resolved_ordering);
LLVMValueRef ptr = ir_llvm_value(g, instruction->ptr);
LLVMValueRef operand = ir_llvm_value(g, instruction->operand);