std.Target: Introduce Cpu convenience functions for feature tests.

Before:

* std.Target.arm.featureSetHas(target.cpu.features, .has_v7)
* std.Target.x86.featureSetHasAny(target.cpu.features, .{ .sse, .avx, .cmov })
* std.Target.wasm.featureSetHasAll(target.cpu.features, .{ .atomics, .bulk_memory })

After:

* target.cpu.has(.arm, .has_v7)
* target.cpu.hasAny(.x86, &.{ .sse, .avx, .cmov })
* target.cpu.hasAll(.wasm, &.{ .atomics, .bulk_memory })

1 files changed, 4 insertions, 4 deletions

diff --git a/src/Compilation.zig b/src/Compilation.zig
index 65ab739ecd..ba599d0207 100644
--- a/src/Compilation.zig
+++ b/src/Compilation.zig
@@ -6469,7 +6469,7 @@ pub fn addCCArgs(
                     var march_index: usize = prefix_len;
                     @memcpy(march_buf[0..prefix.len], prefix);
 
-                    if (std.Target.riscv.featureSetHas(target.cpu.features, .e)) {
+                    if (target.cpu.has(.riscv, .e)) {
                         march_buf[march_index] = 'e';
                     } else {
                         march_buf[march_index] = 'i';
@@ -6477,7 +6477,7 @@ pub fn addCCArgs(
                     march_index += 1;
 
                     for (letters) |letter| {
-                        if (std.Target.riscv.featureSetHas(target.cpu.features, letter.feat)) {
+                        if (target.cpu.has(.riscv, letter.feat)) {
                             march_buf[march_index] = letter.char;
                             march_index += 1;
                         }
@@ -6488,12 +6488,12 @@ pub fn addCCArgs(
                     });
                     try argv.append(march_arg);
 
-                    if (std.Target.riscv.featureSetHas(target.cpu.features, .relax)) {
+                    if (target.cpu.has(.riscv, .relax)) {
                         try argv.append("-mrelax");
                     } else {
                         try argv.append("-mno-relax");
                     }
-                    if (std.Target.riscv.featureSetHas(target.cpu.features, .save_restore)) {
+                    if (target.cpu.has(.riscv, .save_restore)) {
                         try argv.append("-msave-restore");
                     } else {
                         try argv.append("-mno-save-restore");