all: rename i386 to x86

35 files changed, 98 insertions, 98 deletions

diff --git a/lib/c.zig b/lib/c.zig
index c9fa912c35..82f9f5b2e1 100644
--- a/lib/c.zig
+++ b/lib/c.zig
@@ -190,7 +190,7 @@ test "strncmp" {
 // across .o file boundaries. fix comptime @ptrCast of nakedcc functions.
 fn clone() callconv(.Naked) void {
     switch (native_arch) {
-        .i386 => {
+        .x86 => {
             // __clone(func, stack, flags, arg, ptid, tls, ctid)
             //         +8,   +12,   +16,   +20, +24,  +28, +32
             // syscall(SYS_clone, flags, stack, ptid, tls, ctid)
diff --git a/lib/compiler_rt/aulldiv.zig b/lib/compiler_rt/aulldiv.zig
index d9517c6d10..3443e6ca09 100644
--- a/lib/compiler_rt/aulldiv.zig
+++ b/lib/compiler_rt/aulldiv.zig
@@ -7,7 +7,7 @@ const common = @import("common.zig");
 pub const panic = common.panic;
 
 comptime {
-    if (arch == .i386 and abi == .msvc) {
+    if (arch == .x86 and abi == .msvc) {
         // Don't let LLVM apply the stdcall name mangling on those MSVC builtins
         @export(_alldiv, .{ .name = "\x01__alldiv", .linkage = common.linkage });
         @export(_aulldiv, .{ .name = "\x01__aulldiv", .linkage = common.linkage });
diff --git a/lib/compiler_rt/aullrem.zig b/lib/compiler_rt/aullrem.zig
index 43821eb9d3..6960e1eceb 100644
--- a/lib/compiler_rt/aullrem.zig
+++ b/lib/compiler_rt/aullrem.zig
@@ -7,7 +7,7 @@ const common = @import("common.zig");
 pub const panic = common.panic;
 
 comptime {
-    if (arch == .i386 and abi == .msvc) {
+    if (arch == .x86 and abi == .msvc) {
         // Don't let LLVM apply the stdcall name mangling on those MSVC builtins
         @export(_allrem, .{ .name = "\x01__allrem", .linkage = common.linkage });
         @export(_aullrem, .{ .name = "\x01__aullrem", .linkage = common.linkage });
diff --git a/lib/compiler_rt/clear_cache.zig b/lib/compiler_rt/clear_cache.zig
index d2dbfea39f..93e6846ae5 100644
--- a/lib/compiler_rt/clear_cache.zig
+++ b/lib/compiler_rt/clear_cache.zig
@@ -17,7 +17,7 @@ comptime {
 
 fn clear_cache(start: usize, end: usize) callconv(.C) void {
     const x86 = switch (arch) {
-        .i386, .x86_64 => true,
+        .x86, .x86_64 => true,
         else => false,
     };
     const arm32 = switch (arch) {
diff --git a/lib/compiler_rt/common.zig b/lib/compiler_rt/common.zig
index 7c39cef1e5..2d373031e5 100644
--- a/lib/compiler_rt/common.zig
+++ b/lib/compiler_rt/common.zig
@@ -48,7 +48,7 @@ pub const gnu_f16_abi = switch (builtin.cpu.arch) {
     .x86_64,
     => false,
 
-    .i386 => true,
+    .x86 => true,
 
     .arm, .armeb, .thumb, .thumbeb => switch (builtin.abi) {
         .eabi, .eabihf => false,
@@ -79,7 +79,7 @@ pub fn panic(msg: []const u8, error_return_trace: ?*std.builtin.StackTrace, _: ?
 pub const F16T = switch (builtin.cpu.arch) {
     .aarch64, .aarch64_be, .aarch64_32 => f16,
     .riscv64 => if (builtin.zig_backend == .stage1) u16 else f16,
-    .i386, .x86_64 => f16,
+    .x86, .x86_64 => f16,
     else => u16,
 };
 
diff --git a/lib/compiler_rt/divti3.zig b/lib/compiler_rt/divti3.zig
index b99a9081a4..6899cd323f 100644
--- a/lib/compiler_rt/divti3.zig
+++ b/lib/compiler_rt/divti3.zig
@@ -9,7 +9,7 @@ pub const panic = common.panic;
 comptime {
     if (builtin.os.tag == .windows) {
         switch (arch) {
-            .i386 => {
+            .x86 => {
                 @export(__divti3, .{ .name = "__divti3", .linkage = common.linkage });
             },
             .x86_64 => {
diff --git a/lib/compiler_rt/extendf_test.zig b/lib/compiler_rt/extendf_test.zig
index 1d88c0c4fa..9857cf91f9 100644
--- a/lib/compiler_rt/extendf_test.zig
+++ b/lib/compiler_rt/extendf_test.zig
@@ -140,7 +140,7 @@ test "extendhfsf2" {
     try test__extendhfsf2(0x7f00, 0x7fe00000); // sNaN
     // On x86 the NaN becomes quiet because the return is pushed on the x87
     // stack due to ABI requirements
-    if (builtin.target.cpu.arch != .i386 and builtin.target.os.tag == .windows)
+    if (builtin.target.cpu.arch != .x86 and builtin.target.os.tag == .windows)
         try test__extendhfsf2(0x7c01, 0x7f802000); // sNaN
 
     try test__extendhfsf2(0, 0); // 0
diff --git a/lib/compiler_rt/stack_probe.zig b/lib/compiler_rt/stack_probe.zig
index 5ebb851825..b59996b3b6 100644
--- a/lib/compiler_rt/stack_probe.zig
+++ b/lib/compiler_rt/stack_probe.zig
@@ -30,7 +30,7 @@ comptime {
     }
 
     switch (arch) {
-        .i386,
+        .x86,
         .x86_64,
         => {
             @export(zig_probe_stack, .{ .name = "__zig_probe_stack", .linkage = linkage });
@@ -69,7 +69,7 @@ pub fn zig_probe_stack() callconv(.Naked) void {
                 \\        ret
             );
         },
-        .i386 => {
+        .x86 => {
             // %eax = probe length, %esp = stack pointer
             asm volatile (
                 \\        push   %%ecx
@@ -121,7 +121,7 @@ fn win_probe_stack_only() void {
                 \\         ret
             );
         },
-        .i386 => {
+        .x86 => {
             asm volatile (
                 \\         push   %%ecx
                 \\         push   %%eax
@@ -191,7 +191,7 @@ fn win_probe_stack_adjust_sp() void {
                 \\         ret
             );
         },
-        .i386 => {
+        .x86 => {
             asm volatile (
                 \\         push   %%ecx
                 \\         cmp    $0x1000,%%eax
@@ -243,7 +243,7 @@ pub fn __chkstk() callconv(.Naked) void {
     if (comptime arch.isAARCH64()) {
         @call(.{ .modifier = .always_inline }, win_probe_stack_only, .{});
     } else switch (arch) {
-        .i386 => @call(.{ .modifier = .always_inline }, win_probe_stack_adjust_sp, .{}),
+        .x86 => @call(.{ .modifier = .always_inline }, win_probe_stack_adjust_sp, .{}),
         .x86_64 => @call(.{ .modifier = .always_inline }, win_probe_stack_only, .{}),
         else => unreachable,
     }
diff --git a/lib/libc/glibc/abilists b/lib/libc/glibc/abilists
index 179e3f6f3f..538183b11e 100644
--- a/lib/libc/glibc/abilists
+++ b/lib/libc/glibc/abilists
diff --git a/lib/ssp.zig b/lib/ssp.zig
index f11698750d..f75c4d1a55 100644
--- a/lib/ssp.zig
+++ b/lib/ssp.zig
@@ -35,7 +35,7 @@ export fn __chk_fail() callconv(.C) noreturn {
     @panic("buffer overflow detected");
 }
 
-// Emitted when targeting some architectures (eg. i386)
+// Emitted when targeting some architectures (eg. x86)
 // XXX: This symbol should be hidden
 export fn __stack_chk_fail_local() callconv(.C) noreturn {
     __stack_chk_fail();
diff --git a/lib/std/Thread.zig b/lib/std/Thread.zig
index a611ff38de..e2e17a2925 100644
--- a/lib/std/Thread.zig
+++ b/lib/std/Thread.zig
@@ -753,7 +753,7 @@ const LinuxThreadImpl = struct {
         /// https://github.com/ifduyue/musl/search?q=__unmapself
         fn freeAndExit(self: *ThreadCompletion) noreturn {
             switch (target.cpu.arch) {
-                .i386 => asm volatile (
+                .x86 => asm volatile (
                     \\  movl $91, %%eax
                     \\  movl %[ptr], %%ebx
                     \\  movl %[len], %%ecx
@@ -959,10 +959,10 @@ const LinuxThreadImpl = struct {
             else => |e| return e,
         };
 
-        // Prepare the TLS segment and prepare a user_desc struct when needed on i386
+        // Prepare the TLS segment and prepare a user_desc struct when needed on x86
         var tls_ptr = os.linux.tls.prepareTLS(mapped[tls_offset..]);
-        var user_desc: if (target.cpu.arch == .i386) os.linux.user_desc else void = undefined;
-        if (target.cpu.arch == .i386) {
+        var user_desc: if (target.cpu.arch == .x86) os.linux.user_desc else void = undefined;
+        if (target.cpu.arch == .x86) {
             defer tls_ptr = @ptrToInt(&user_desc);
             user_desc = .{
                 .entry_number = os.linux.tls.tls_image.gdt_entry_number,
diff --git a/lib/std/atomic.zig b/lib/std/atomic.zig
index ef1cce1774..d10c122482 100644
--- a/lib/std/atomic.zig
+++ b/lib/std/atomic.zig
@@ -44,7 +44,7 @@ pub inline fn spinLoopHint() void {
         // No-op instruction that can hint to save (or share with a hardware-thread)
         // pipelining/power resources
         // https://software.intel.com/content/www/us/en/develop/articles/benefitting-power-and-performance-sleep-loops.html
-        .i386, .x86_64 => asm volatile ("pause" ::: "memory"),
+        .x86, .x86_64 => asm volatile ("pause" ::: "memory"),
 
         // No-op instruction that serves as a hardware-thread resource yield hint.
         // https://stackoverflow.com/a/7588941
diff --git a/lib/std/build.zig b/lib/std/build.zig
index 8c6af98eea..ac85aff92a 100644
--- a/lib/std/build.zig
+++ b/lib/std/build.zig
@@ -2978,12 +2978,12 @@ pub const LibExeObjStep = struct {
                             if (glibc_dir_arg) |dir| {
                                 // TODO look into making this a call to `linuxTriple`. This
                                 // needs the directory to be called "i686" rather than
-                                // "i386" which is why we do it manually here.
+                                // "x86" which is why we do it manually here.
                                 const fmt_str = "{s}" ++ fs.path.sep_str ++ "{s}-{s}-{s}";
                                 const cpu_arch = self.target.getCpuArch();
                                 const os_tag = self.target.getOsTag();
                                 const abi = self.target.getAbi();
-                                const cpu_arch_name: []const u8 = if (cpu_arch == .i386)
+                                const cpu_arch_name: []const u8 = if (cpu_arch == .x86)
                                     "i686"
                                 else
                                     @tagName(cpu_arch);
diff --git a/lib/std/build/EmulatableRunStep.zig b/lib/std/build/EmulatableRunStep.zig
index 23bdf5e595..52ce8edfac 100644
--- a/lib/std/build/EmulatableRunStep.zig
+++ b/lib/std/build/EmulatableRunStep.zig
@@ -95,12 +95,12 @@ fn make(step: *Step) !void {
             if (glibc_dir_arg) |dir| {
                 // TODO look into making this a call to `linuxTriple`. This
                 // needs the directory to be called "i686" rather than
-                // "i386" which is why we do it manually here.
+                // "x86" which is why we do it manually here.
                 const fmt_str = "{s}" ++ fs.path.sep_str ++ "{s}-{s}-{s}";
                 const cpu_arch = self.exe.target.getCpuArch();
                 const os_tag = self.exe.target.getOsTag();
                 const abi = self.exe.target.getAbi();
-                const cpu_arch_name: []const u8 = if (cpu_arch == .i386)
+                const cpu_arch_name: []const u8 = if (cpu_arch == .x86)
                     "i686"
                 else
                     @tagName(cpu_arch);
diff --git a/lib/std/c/freebsd.zig b/lib/std/c/freebsd.zig
index 799040c381..9614a14522 100644
--- a/lib/std/c/freebsd.zig
+++ b/lib/std/c/freebsd.zig
@@ -1444,7 +1444,7 @@ pub const E = enum(u16) {
 };
 
 pub const MINSIGSTKSZ = switch (builtin.cpu.arch) {
-    .i386, .x86_64 => 2048,
+    .x86, .x86_64 => 2048,
     .arm, .aarch64 => 4096,
     else => @compileError("MINSIGSTKSZ not defined for this architecture"),
 };
diff --git a/lib/std/c/netbsd.zig b/lib/std/c/netbsd.zig
index 18ed702791..98a6563140 100644
--- a/lib/std/c/netbsd.zig
+++ b/lib/std/c/netbsd.zig
@@ -80,7 +80,7 @@ pub const pthread_cond_t = extern struct {
 pub const pthread_rwlock_t = extern struct {
     magic: c_uint = 0x99990009,
     interlock: switch (builtin.cpu.arch) {
-        .aarch64, .sparc, .x86_64, .i386 => u8,
+        .aarch64, .sparc, .x86_64, .x86 => u8,
         .arm, .powerpc => c_int,
         else => unreachable,
     } = 0,
@@ -97,7 +97,7 @@ const pthread_spin_t = switch (builtin.cpu.arch) {
     .aarch64, .aarch64_be, .aarch64_32 => u8,
     .mips, .mipsel, .mips64, .mips64el => u32,
     .powerpc, .powerpc64, .powerpc64le => i32,
-    .i386, .x86_64 => u8,
+    .x86, .x86_64 => u8,
     .arm, .armeb, .thumb, .thumbeb => i32,
     .sparc, .sparcel, .sparc64 => u8,
     .riscv32, .riscv64 => u32,
@@ -105,7 +105,7 @@ const pthread_spin_t = switch (builtin.cpu.arch) {
 };
 
 const padded_pthread_spin_t = switch (builtin.cpu.arch) {
-    .i386, .x86_64 => u32,
+    .x86, .x86_64 => u32,
     .sparc, .sparcel, .sparc64 => u32,
     else => pthread_spin_t,
 };
@@ -1067,7 +1067,7 @@ pub const ucontext_t = extern struct {
     mcontext: mcontext_t,
     __pad: [
         switch (builtin.cpu.arch) {
-            .i386 => 4,
+            .x86 => 4,
             .mips, .mipsel, .mips64, .mips64el => 14,
             .arm, .armeb, .thumb, .thumbeb => 1,
             .sparc, .sparcel, .sparc64 => if (@sizeOf(usize) == 4) 43 else 8,
diff --git a/lib/std/c/openbsd.zig b/lib/std/c/openbsd.zig
index d78b679a1c..fbfae7b0c9 100644
--- a/lib/std/c/openbsd.zig
+++ b/lib/std/c/openbsd.zig
@@ -1247,7 +1247,7 @@ pub const E = enum(u16) {
 };
 
 const _MAX_PAGE_SHIFT = switch (builtin.cpu.arch) {
-    .i386 => 12,
+    .x86 => 12,
     .sparc64 => 13,
 };
 pub const MINSIGSTKSZ = 1 << _MAX_PAGE_SHIFT;
diff --git a/lib/std/coff.zig b/lib/std/coff.zig
index ad440e7757..6b300276e9 100644
--- a/lib/std/coff.zig
+++ b/lib/std/coff.zig
@@ -1025,7 +1025,7 @@ pub const MachineType = enum(u16) {
             .powerpc => .POWERPC,
             .riscv32 => .RISCV32,
             .thumb => .Thumb,
-            .i386 => .I386,
+            .x86 => .I386,
             .aarch64 => .ARM64,
             .riscv64 => .RISCV64,
             .x86_64 => .X64,
@@ -1040,7 +1040,7 @@ pub const MachineType = enum(u16) {
             .POWERPC => .powerpc,
             .RISCV32 => .riscv32,
             .Thumb => .thumb,
-            .I386 => .i386,
+            .I386 => .x86,
             .ARM64 => .aarch64,
             .RISCV64 => .riscv64,
             .X64 => .x86_64,
diff --git a/lib/std/debug.zig b/lib/std/debug.zig
index de7aa07b8b..205be60b11 100644
--- a/lib/std/debug.zig
+++ b/lib/std/debug.zig
@@ -182,7 +182,7 @@ pub fn dumpStackTraceFromBase(bp: usize, ip: usize) void {
             // therefore, we do a check for `return_address == 0` before subtracting 1 from it to avoid
             // an overflow. We do not need to signal `StackIterator` as it will correctly detect this
             // condition on the subsequent iteration and return `null` thus terminating the loop.
-            // same behaviour for i386-windows-msvc
+            // same behaviour for x86-windows-msvc
             const address = if (return_address == 0) return_address else return_address - 1;
             printSourceAtAddress(debug_info, stderr, address, tty_config) catch return;
         }
@@ -568,7 +568,7 @@ pub fn writeCurrentStackTrace(
         // therefore, we do a check for `return_address == 0` before subtracting 1 from it to avoid
         // an overflow. We do not need to signal `StackIterator` as it will correctly detect this
         // condition on the subsequent iteration and return `null` thus terminating the loop.
-        // same behaviour for i386-windows-msvc
+        // same behaviour for x86-windows-msvc
         const address = if (return_address == 0) return_address else return_address - 1;
         try printSourceAtAddress(debug_info, out_stream, address, tty_config);
     }
@@ -1922,7 +1922,7 @@ fn handleSegfaultPosix(sig: i32, info: *const os.siginfo_t, ctx_ptr: ?*const any
     }
 
     switch (native_arch) {
-        .i386 => {
+        .x86 => {
             const ctx = @ptrCast(*const os.ucontext_t, @alignCast(@alignOf(os.ucontext_t), ctx_ptr));
             const ip = @intCast(usize, ctx.mcontext.gregs[os.REG.EIP]);
             const bp = @intCast(usize, ctx.mcontext.gregs[os.REG.EBP]);
diff --git a/lib/std/elf.zig b/lib/std/elf.zig
index 4a9b7a498f..74eb181867 100644
--- a/lib/std/elf.zig
+++ b/lib/std/elf.zig
@@ -1502,7 +1502,7 @@ pub const EM = enum(u16) {
             .MIPS_RS3_LE => .mipsel,
             .PPC => .powerpc,
             .SPARC => .sparc,
-            .@"386" => .i386,
+            .@"386" => .x86,
             .XCORE => .xcore,
             .CSR_KALIMBA => .kalimba,
             .LANAI => .lanai,
diff --git a/lib/std/macho.zig b/lib/std/macho.zig
index 7511b482bd..11b737a2b7 100644
--- a/lib/std/macho.zig
+++ b/lib/std/macho.zig
@@ -1201,7 +1201,7 @@ pub const MH_DEAD_STRIPPABLE_DYLIB = 0x400000;
 /// Contains a section of type S_THREAD_LOCAL_VARIABLES
 pub const MH_HAS_TLV_DESCRIPTORS = 0x800000;
 
-/// When this bit is set, the OS will run the main executable with a non-executable heap even on platforms (e.g. i386) that don't require it. Only used in MH_EXECUTE filetypes.
+/// When this bit is set, the OS will run the main executable with a non-executable heap even on platforms (e.g. x86) that don't require it. Only used in MH_EXECUTE filetypes.
 pub const MH_NO_HEAP_EXECUTION = 0x1000000;
 
 /// The code was linked for use in an application extension.
@@ -1444,7 +1444,7 @@ pub const S_ATTR_NO_DEAD_STRIP = 0x10000000;
 /// blocks are live if they reference live blocks
 pub const S_ATTR_LIVE_SUPPORT = 0x8000000;
 
-/// used with i386 code stubs written on by dyld
+/// used with x86 code stubs written on by dyld
 pub const S_ATTR_SELF_MODIFYING_CODE = 0x4000000;
 
 /// section contains some machine instructions
diff --git a/lib/std/os/linux.zig b/lib/std/os/linux.zig
index da9ea74327..f723024e87 100644
--- a/lib/std/os/linux.zig
+++ b/lib/std/os/linux.zig
@@ -33,7 +33,7 @@ const syscall_bits = switch (native_arch) {
 };
 
 const arch_bits = switch (native_arch) {
-    .i386 => @import("linux/i386.zig"),
+    .x86 => @import("linux/x86.zig"),
     .x86_64 => @import("linux/x86_64.zig"),
     .aarch64 => @import("linux/arm64.zig"),
     .arm, .thumb => @import("linux/arm-eabi.zig"),
@@ -94,7 +94,7 @@ pub const SECCOMP = @import("linux/seccomp.zig");
 
 pub const syscalls = @import("linux/syscalls.zig");
 pub const SYS = switch (@import("builtin").cpu.arch) {
-    .i386 => syscalls.X86,
+    .x86 => syscalls.X86,
     .x86_64 => syscalls.X64,
     .aarch64 => syscalls.Arm64,
     .arm, .thumb => syscalls.Arm,
@@ -1198,42 +1198,42 @@ pub fn sigismember(set: *const sigset_t, sig: u6) bool {
 }
 
 pub fn getsockname(fd: i32, noalias addr: *sockaddr, noalias len: *socklen_t) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.getsockname, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len) });
     }
     return syscall3(.getsockname, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len));
 }
 
 pub fn getpeername(fd: i32, noalias addr: *sockaddr, noalias len: *socklen_t) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.getpeername, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len) });
     }
     return syscall3(.getpeername, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len));
 }
 
 pub fn socket(domain: u32, socket_type: u32, protocol: u32) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.socket, &[3]usize{ domain, socket_type, protocol });
     }
     return syscall3(.socket, domain, socket_type, protocol);
 }
 
 pub fn setsockopt(fd: i32, level: u32, optname: u32, optval: [*]const u8, optlen: socklen_t) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.setsockopt, &[5]usize{ @bitCast(usize, @as(isize, fd)), level, optname, @ptrToInt(optval), @intCast(usize, optlen) });
     }
     return syscall5(.setsockopt, @bitCast(usize, @as(isize, fd)), level, optname, @ptrToInt(optval), @intCast(usize, optlen));
 }
 
 pub fn getsockopt(fd: i32, level: u32, optname: u32, noalias optval: [*]u8, noalias optlen: *socklen_t) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.getsockopt, &[5]usize{ @bitCast(usize, @as(isize, fd)), level, optname, @ptrToInt(optval), @ptrToInt(optlen) });
     }
     return syscall5(.getsockopt, @bitCast(usize, @as(isize, fd)), level, optname, @ptrToInt(optval), @ptrToInt(optlen));
 }
 
 pub fn sendmsg(fd: i32, msg: *const std.x.os.Socket.Message, flags: c_int) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.sendmsg, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(msg), @bitCast(usize, @as(isize, flags)) });
     }
     return syscall3(.sendmsg, @bitCast(usize, @as(isize, fd)), @ptrToInt(msg), @bitCast(usize, @as(isize, flags)));
@@ -1280,49 +1280,49 @@ pub fn sendmmsg(fd: i32, msgvec: [*]mmsghdr_const, vlen: u32, flags: u32) usize
 }
 
 pub fn connect(fd: i32, addr: *const anyopaque, len: socklen_t) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.connect, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), len });
     }
     return syscall3(.connect, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), len);
 }
 
 pub fn recvmsg(fd: i32, msg: *std.x.os.Socket.Message, flags: c_int) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.recvmsg, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(msg), @bitCast(usize, @as(isize, flags)) });
     }
     return syscall3(.recvmsg, @bitCast(usize, @as(isize, fd)), @ptrToInt(msg), @bitCast(usize, @as(isize, flags)));
 }
 
 pub fn recvfrom(fd: i32, noalias buf: [*]u8, len: usize, flags: u32, noalias addr: ?*sockaddr, noalias alen: ?*socklen_t) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.recvfrom, &[6]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(buf), len, flags, @ptrToInt(addr), @ptrToInt(alen) });
     }
     return syscall6(.recvfrom, @bitCast(usize, @as(isize, fd)), @ptrToInt(buf), len, flags, @ptrToInt(addr), @ptrToInt(alen));
 }
 
 pub fn shutdown(fd: i32, how: i32) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.shutdown, &[2]usize{ @bitCast(usize, @as(isize, fd)), @bitCast(usize, @as(isize, how)) });
     }
     return syscall2(.shutdown, @bitCast(usize, @as(isize, fd)), @bitCast(usize, @as(isize, how)));
 }
 
 pub fn bind(fd: i32, addr: *const sockaddr, len: socklen_t) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.bind, &[3]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @intCast(usize, len) });
     }
     return syscall3(.bind, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @intCast(usize, len));
 }
 
 pub fn listen(fd: i32, backlog: u32) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.listen, &[2]usize{ @bitCast(usize, @as(isize, fd)), backlog });
     }
     return syscall2(.listen, @bitCast(usize, @as(isize, fd)), backlog);
 }
 
 pub fn sendto(fd: i32, buf: [*]const u8, len: usize, flags: u32, addr: ?*const sockaddr, alen: socklen_t) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.sendto, &[6]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(buf), len, flags, @ptrToInt(addr), @intCast(usize, alen) });
     }
     return syscall6(.sendto, @bitCast(usize, @as(isize, fd)), @ptrToInt(buf), len, flags, @ptrToInt(addr), @intCast(usize, alen));
@@ -1349,21 +1349,21 @@ pub fn sendfile(outfd: i32, infd: i32, offset: ?*i64, count: usize) usize {
 }
 
 pub fn socketpair(domain: i32, socket_type: i32, protocol: i32, fd: *[2]i32) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.socketpair, &[4]usize{ @intCast(usize, domain), @intCast(usize, socket_type), @intCast(usize, protocol), @ptrToInt(fd) });
     }
     return syscall4(.socketpair, @intCast(usize, domain), @intCast(usize, socket_type), @intCast(usize, protocol), @ptrToInt(fd));
 }
 
 pub fn accept(fd: i32, noalias addr: ?*sockaddr, noalias len: ?*socklen_t) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.accept, &[4]usize{ fd, addr, len, 0 });
     }
     return accept4(fd, addr, len, 0);
 }
 
 pub fn accept4(fd: i32, noalias addr: ?*sockaddr, noalias len: ?*socklen_t, flags: u32) usize {
-    if (native_arch == .i386) {
+    if (native_arch == .x86) {
         return socketcall(SC.accept4, &[4]usize{ @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len), flags });
     }
     return syscall4(.accept4, @bitCast(usize, @as(isize, fd)), @ptrToInt(addr), @ptrToInt(len), flags);
@@ -3459,12 +3459,12 @@ pub fn CPU_COUNT(set: cpu_set_t) cpu_count_t {
 }
 
 pub const MINSIGSTKSZ = switch (native_arch) {
-    .i386, .x86_64, .arm, .mipsel => 2048,
+    .x86, .x86_64, .arm, .mipsel => 2048,
     .aarch64 => 5120,
     else => @compileError("MINSIGSTKSZ not defined for this architecture"),
 };
 pub const SIGSTKSZ = switch (native_arch) {
-    .i386, .x86_64, .arm, .mipsel => 8192,
+    .x86, .x86_64, .arm, .mipsel => 8192,
     .aarch64 => 16384,
     else => @compileError("SIGSTKSZ not defined for this architecture"),
 };
@@ -5631,7 +5631,7 @@ pub const AUDIT = struct {
         const LE = 0x40000000;
 
         pub const current: AUDIT.ARCH = switch (native_arch) {
-            .i386 => .I386,
+            .x86 => .X86,
             .x86_64 => .X86_64,
             .aarch64 => .AARCH64,
             .arm, .thumb => .ARM,
@@ -5650,7 +5650,7 @@ pub const AUDIT = struct {
         ARMEB = toAudit(.armeb),
         CSKY = toAudit(.csky),
         HEXAGON = @enumToInt(std.elf.EM.HEXAGON),
-        I386 = toAudit(.i386),
+        X86 = toAudit(.x86),
         M68K = toAudit(.m68k),
         MIPS = toAudit(.mips),
         MIPSEL = toAudit(.mips) | LE,
diff --git a/lib/std/os/linux/start_pie.zig b/lib/std/os/linux/start_pie.zig
index bf3e9c4c1e..aa1418f4a3 100644
--- a/lib/std/os/linux/start_pie.zig
+++ b/lib/std/os/linux/start_pie.zig
@@ -11,7 +11,7 @@ const R_RISCV_RELATIVE = 3;
 const R_SPARC_RELATIVE = 22;
 
 const R_RELATIVE = switch (builtin.cpu.arch) {
-    .i386 => R_386_RELATIVE,
+    .x86 => R_386_RELATIVE,
     .x86_64 => R_AMD64_RELATIVE,
     .arm => R_ARM_RELATIVE,
     .aarch64 => R_AARCH64_RELATIVE,
@@ -24,7 +24,7 @@ const R_RELATIVE = switch (builtin.cpu.arch) {
 // relocation that, at this point, is not yet applied.
 fn getDynamicSymbol() [*]elf.Dyn {
     return switch (builtin.cpu.arch) {
-        .i386 => asm volatile (
+        .x86 => asm volatile (
             \\ .weak _DYNAMIC
             \\ .hidden _DYNAMIC
             \\ call 1f
diff --git a/lib/std/os/linux/tls.zig b/lib/std/os/linux/tls.zig
index d91f7d7a9e..d487530f55 100644
--- a/lib/std/os/linux/tls.zig
+++ b/lib/std/os/linux/tls.zig
@@ -30,7 +30,7 @@ const native_arch = @import("builtin").cpu.arch;
 //         `-- The thread pointer register points here
 //
 // The structure of the TCB is not defined by the ABI so we reserve enough space
-// for a single pointer as some architectures such as i386 and x86_64 need a
+// for a single pointer as some architectures such as x86 and x86_64 need a
 // pointer to the TCB block itself at the address pointed by the tp.
 //
 // In this case the control structure and DTV are placed one after another right
@@ -49,7 +49,7 @@ const TLSVariant = enum {
 
 const tls_variant = switch (native_arch) {
     .arm, .armeb, .thumb, .aarch64, .aarch64_be, .riscv32, .riscv64, .mips, .mipsel, .powerpc, .powerpc64, .powerpc64le => TLSVariant.VariantI,
-    .x86_64, .i386, .sparc64 => TLSVariant.VariantII,
+    .x86_64, .x86, .sparc64 => TLSVariant.VariantII,
     else => @compileError("undefined tls_variant for this architecture"),
 };
 
@@ -102,7 +102,7 @@ const TLSImage = struct {
     dtv_offset: usize,
     data_offset: usize,
     data_size: usize,
-    // Only used on the i386 architecture
+    // Only used on the x86 architecture
     gdt_entry_number: usize,
 };
 
@@ -110,7 +110,7 @@ pub var tls_image: TLSImage = undefined;
 
 pub fn setThreadPointer(addr: usize) void {
     switch (native_arch) {
-        .i386 => {
+        .x86 => {
             var user_desc = std.os.linux.user_desc{
                 .entry_number = tls_image.gdt_entry_number,
                 .base_addr = addr,
diff --git a/lib/std/os/linux/i386.zig b/lib/std/os/linux/x86.zig
index 9357002519..9357002519 100644
--- a/lib/std/os/linux/i386.zig
+++ b/lib/std/os/linux/x86.zig
diff --git a/lib/std/os/test.zig b/lib/std/os/test.zig
index a8497586f9..38c029f612 100644
--- a/lib/std/os/test.zig
+++ b/lib/std/os/test.zig
@@ -746,7 +746,7 @@ test "sigaction" {
         return error.SkipZigTest;
 
     // https://github.com/ziglang/zig/issues/7427
-    if (native_os == .linux and builtin.target.cpu.arch == .i386)
+    if (native_os == .linux and builtin.target.cpu.arch == .x86)
         return error.SkipZigTest;
 
     const S = struct {
diff --git a/lib/std/os/windows.zig b/lib/std/os/windows.zig
index 71dfc70d37..18c6244baf 100644
--- a/lib/std/os/windows.zig
+++ b/lib/std/os/windows.zig
@@ -1750,7 +1750,7 @@ pub fn UnlockFile(
 
 pub fn teb() *TEB {
     return switch (native_arch) {
-        .i386 => asm volatile (
+        .x86 => asm volatile (
             \\ movl %%fs:0x18, %[ptr]
             : [ptr] "=r" (-> *TEB),
         ),
@@ -2053,7 +2053,7 @@ pub const STD_OUTPUT_HANDLE = maxInt(DWORD) - 11 + 1;
 /// The standard error device. Initially, this is the active console screen buffer, CONOUT$.
 pub const STD_ERROR_HANDLE = maxInt(DWORD) - 12 + 1;
 
-pub const WINAPI: std.builtin.CallingConvention = if (native_arch == .i386)
+pub const WINAPI: std.builtin.CallingConvention = if (native_arch == .x86)
     .Stdcall
 else
     .C;
@@ -3019,7 +3019,7 @@ pub const EXCEPTION_RECORD = extern struct {
 };
 
 pub usingnamespace switch (native_arch) {
-    .i386 => struct {
+    .x86 => struct {
         pub const FLOATING_SAVE_AREA = extern struct {
             ControlWord: DWORD,
             StatusWord: DWORD,
diff --git a/lib/std/start.zig b/lib/std/start.zig
index 7ba24ad78c..8a0febf1a1 100644
--- a/lib/std/start.zig
+++ b/lib/std/start.zig
@@ -275,7 +275,7 @@ fn _start() callconv(.Naked) noreturn {
                     \\ andq $-16, %%rsp
                     \\ call _posixCallMainAndExit
                 ),
-                .i386 => asm volatile (
+                .x86 => asm volatile (
                     \\ xorl %%ebp, %%ebp
                     \\ movl %%esp, argc_argv_ptr
                     \\ andl $-16, %%esp
@@ -307,7 +307,7 @@ fn _start() callconv(.Naked) noreturn {
                     : [argc] "={rsp}" (-> [*]usize),
                 );
             },
-            .i386 => {
+            .x86 => {
                 argc_argv_ptr = asm volatile (
                     \\ xor %%ebp, %%ebp
                     : [argc] "={esp}" (-> [*]usize),
diff --git a/lib/std/start_windows_tls.zig b/lib/std/start_windows_tls.zig
index 7c9930fe6b..104424ce10 100644
--- a/lib/std/start_windows_tls.zig
+++ b/lib/std/start_windows_tls.zig
@@ -8,7 +8,7 @@ export var __xl_a: std.os.windows.PIMAGE_TLS_CALLBACK linksection(".CRT$XLA") =
 export var __xl_z: std.os.windows.PIMAGE_TLS_CALLBACK linksection(".CRT$XLZ") = null;
 
 comptime {
-    if (builtin.target.cpu.arch == .i386) {
+    if (builtin.target.cpu.arch == .x86) {
         // The __tls_array is the offset of the ThreadLocalStoragePointer field
         // in the TEB block whose base address held in the %fs segment.
         asm (
diff --git a/lib/std/target.zig b/lib/std/target.zig
index 34bae7cda2..691c5f2447 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -850,7 +850,7 @@ pub const Target = struct {
             tcele,
             thumb,
             thumbeb,
-            i386,
+            x86,
             x86_64,
             xcore,
             nvptx,
@@ -879,7 +879,7 @@ pub const Target = struct {
 
             pub fn isX86(arch: Arch) bool {
                 return switch (arch) {
-                    .i386, .x86_64 => true,
+                    .x86, .x86_64 => true,
                     else => false,
                 };
             }
@@ -999,7 +999,7 @@ pub const Target = struct {
                     .tcele => .NONE,
                     .thumb => .ARM,
                     .thumbeb => .ARM,
-                    .i386 => .@"386",
+                    .x86 => .@"386",
                     .xcore => .XCORE,
                     .nvptx => .NONE,
                     .amdil => .NONE,
@@ -1063,7 +1063,7 @@ pub const Target = struct {
                     .tcele => .Unknown,
                     .thumb => .Thumb,
                     .thumbeb => .Thumb,
-                    .i386 => .I386,
+                    .x86 => .I386,
                     .xcore => .Unknown,
                     .nvptx => .Unknown,
                     .amdil => .Unknown,
@@ -1134,7 +1134,7 @@ pub const Target = struct {
                     .r600,
                     .riscv32,
                     .riscv64,
-                    .i386,
+                    .x86,
                     .x86_64,
                     .wasm32,
                     .wasm64,
@@ -1179,7 +1179,7 @@ pub const Target = struct {
                 const is_nvptx = arch == .nvptx or arch == .nvptx64;
                 return switch (address_space) {
                     .generic => true,
-                    .fs, .gs, .ss => arch == .x86_64 or arch == .i386,
+                    .fs, .gs, .ss => arch == .x86_64 or arch == .x86,
                     .global, .constant, .local, .shared => arch == .amdgcn or is_nvptx,
                     .param => is_nvptx,
                 };
@@ -1211,7 +1211,7 @@ pub const Target = struct {
                     .tcele,
                     .thumb,
                     .thumbeb,
-                    .i386,
+                    .x86,
                     .xcore,
                     .nvptx,
                     .amdil,
@@ -1267,7 +1267,7 @@ pub const Target = struct {
                     .riscv32, .riscv64 => "riscv",
                     .sparc, .sparc64, .sparcel => "sparc",
                     .s390x => "s390x",
-                    .i386, .x86_64 => "x86",
+                    .x86, .x86_64 => "x86",
                     .nvptx, .nvptx64 => "nvptx",
                     .wasm32, .wasm64 => "wasm",
                     .spirv32, .spirv64 => "spir-v",
@@ -1291,7 +1291,7 @@ pub const Target = struct {
                     .sparc, .sparc64, .sparcel => &sparc.all_features,
                     .spirv32, .spirv64 => &spirv.all_features,
                     .s390x => &s390x.all_features,
-                    .i386, .x86_64 => &x86.all_features,
+                    .x86, .x86_64 => &x86.all_features,
                     .nvptx, .nvptx64 => &nvptx.all_features,
                     .ve => &ve.all_features,
                     .wasm32, .wasm64 => &wasm.all_features,
@@ -1315,7 +1315,7 @@ pub const Target = struct {
                     .riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
                     .sparc, .sparc64, .sparcel => comptime allCpusFromDecls(sparc.cpu),
                     .s390x => comptime allCpusFromDecls(s390x.cpu),
-                    .i386, .x86_64 => comptime allCpusFromDecls(x86.cpu),
+                    .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu),
                     .nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu),
                     .ve => comptime allCpusFromDecls(ve.cpu),
                     .wasm32, .wasm64 => comptime allCpusFromDecls(wasm.cpu),
@@ -1377,7 +1377,7 @@ pub const Target = struct {
                     .sparc, .sparcel => &sparc.cpu.generic,
                     .sparc64 => &sparc.cpu.v9, // 64-bit SPARC needs v9 as the baseline
                     .s390x => &s390x.cpu.generic,
-                    .i386 => &x86.cpu.i386,
+                    .x86 => &x86.cpu.x86,
                     .x86_64 => &x86.cpu.x86_64,
                     .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
                     .ve => &ve.cpu.generic,
@@ -1392,7 +1392,7 @@ pub const Target = struct {
                     .arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline,
                     .riscv32 => &riscv.cpu.baseline_rv32,
                     .riscv64 => &riscv.cpu.baseline_rv64,
-                    .i386 => &x86.cpu.pentium4,
+                    .x86 => &x86.cpu.pentium4,
                     .nvptx, .nvptx64 => &nvptx.cpu.sm_20,
                     .sparc, .sparcel => &sparc.cpu.v8,
 
@@ -1622,7 +1622,7 @@ pub const Target = struct {
             .dragonfly => return copy(&result, "/libexec/ld-elf.so.2"),
             .solaris => return copy(&result, "/lib/64/ld.so.1"),
             .linux => switch (self.cpu.arch) {
-                .i386,
+                .x86,
                 .sparc,
                 .sparcel,
                 => return copy(&result, "/lib/ld-linux.so.2"),
@@ -1771,7 +1771,7 @@ pub const Target = struct {
     /// 5c arm     little-endian ARM
     /// 6c amd64   AMD64 and compatibles (e.g., Intel EM64T)
     /// 7c arm64   ARM64 (ARMv8)
-    /// 8c 386     Intel i386, i486, Pentium, etc.
+    /// 8c 386     Intel x86, i486, Pentium, etc.
     /// kc sparc   Sun SPARC
     /// qc power   Power PC
     /// vc mips    big-endian MIPS 3000 family
@@ -1780,7 +1780,7 @@ pub const Target = struct {
             .arm => ".5",
             .x86_64 => ".6",
             .aarch64 => ".7",
-            .i386 => ".8",
+            .x86 => ".8",
             .sparc => ".k",
             .powerpc, .powerpcle => ".q",
             .mips, .mipsel => ".v",
@@ -1815,7 +1815,7 @@ pub const Target = struct {
             .wasm64,
             => 8,
 
-            .i386 => return switch (target.os.tag) {
+            .x86 => return switch (target.os.tag) {
                 .windows, .uefi => 8,
                 else => 4,
             },
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
index a561c317bd..0d38e70663 100644
--- a/lib/std/target/x86.zig
+++ b/lib/std/target/x86.zig
@@ -2040,8 +2040,8 @@ pub const cpu = struct {
             .xsaveopt,
         }),
     };
-    pub const @"i386" = CpuModel{
-        .name = "i386",
+    pub const x86 = CpuModel{
+        .name = "x86",
         .llvm_name = "i386",
         .features = featureSet(&[_]Feature{
             .slow_unaligned_mem_16,
diff --git a/lib/std/valgrind.zig b/lib/std/valgrind.zig
index 7532e73e49..471342ef17 100644
--- a/lib/std/valgrind.zig
+++ b/lib/std/valgrind.zig
@@ -8,7 +8,7 @@ pub fn doClientRequest(default: usize, request: usize, a1: usize, a2: usize, a3:
     }
 
     switch (builtin.target.cpu.arch) {
-        .i386 => {
+        .x86 => {
             return asm volatile (
                 \\ roll $3,  %%edi ; roll $13, %%edi
                 \\ roll $29, %%edi ; roll $19, %%edi
diff --git a/lib/std/zig/CrossTarget.zig b/lib/std/zig/CrossTarget.zig
index 6c59a4a3a1..aad0cb42f2 100644
--- a/lib/std/zig/CrossTarget.zig
+++ b/lib/std/zig/CrossTarget.zig
@@ -592,7 +592,7 @@ pub const VcpkgLinkage = std.builtin.LinkMode;
 /// Returned slice must be freed by the caller.
 pub fn vcpkgTriplet(self: CrossTarget, allocator: mem.Allocator, linkage: VcpkgLinkage) ![]u8 {
     const arch = switch (self.getCpuArch()) {
-        .i386 => "x86",
+        .x86 => "x86",
         .x86_64 => "x64",
 
         .arm,
diff --git a/lib/std/zig/system/NativeTargetInfo.zig b/lib/std/zig/system/NativeTargetInfo.zig
index c7b3f73f89..09b863cdf7 100644
--- a/lib/std/zig/system/NativeTargetInfo.zig
+++ b/lib/std/zig/system/NativeTargetInfo.zig
@@ -199,11 +199,11 @@ pub fn detect(cross_target: CrossTarget) DetectError!NativeTargetInfo {
     // For x86, we need to populate some CPU feature flags depending on architecture
     // and mode:
     //  * 16bit_mode => if the abi is code16
-    //  * 32bit_mode => if the arch is i386
+    //  * 32bit_mode => if the arch is x86
     // However, the "mode" flags can be used as overrides, so if the user explicitly
     // sets one of them, that takes precedence.
     switch (cpu_arch) {
-        .i386 => {
+        .x86 => {
             if (!std.Target.x86.featureSetHasAny(cross_target.cpu_features_add, .{
                 .@"16bit_mode", .@"32bit_mode",
             })) {
@@ -969,7 +969,7 @@ fn detectNativeCpuAndFeatures(cpu_arch: Target.Cpu.Arch, os: Target.Os, cross_ta
     // although it is a runtime value, is guaranteed to be one of the architectures in the set
     // of the respective switch prong.
     switch (builtin.cpu.arch) {
-        .x86_64, .i386 => {
+        .x86_64, .x86 => {
             return @import("x86.zig").detectNativeCpuAndFeatures(cpu_arch, os, cross_target);
         },
         else => {},
@@ -1019,7 +1019,7 @@ pub fn getExternalExecutor(
         if (host.target.cpu.arch == candidate.target.cpu.arch)
             break :cpu_ok true;
 
-        if (host.target.cpu.arch == .x86_64 and candidate.target.cpu.arch == .i386)
+        if (host.target.cpu.arch == .x86_64 and candidate.target.cpu.arch == .x86)
             break :cpu_ok true;
 
         if (host.target.cpu.arch == .aarch64 and candidate.target.cpu.arch == .arm)
@@ -1068,7 +1068,7 @@ pub fn getExternalExecutor(
             .arm => Executor{ .qemu = "qemu-arm" },
             .armeb => Executor{ .qemu = "qemu-armeb" },
             .hexagon => Executor{ .qemu = "qemu-hexagon" },
-            .i386 => Executor{ .qemu = "qemu-i386" },
+            .x86 => Executor{ .qemu = "qemu-i386" },
             .m68k => Executor{ .qemu = "qemu-m68k" },
             .mips => Executor{ .qemu = "qemu-mips" },
             .mipsel => Executor{ .qemu = "qemu-mipsel" },
diff --git a/lib/std/zig/system/x86.zig b/lib/std/zig/system/x86.zig
index 66468ba6ff..50198fc654 100644
--- a/lib/std/zig/system/x86.zig
+++ b/lib/std/zig/system/x86.zig
@@ -80,7 +80,7 @@ fn detectIntelProcessor(cpu: *Target.Cpu, family: u32, model: u32, brand_id: u32
     }
     switch (family) {
         3 => {
-            cpu.model = &Target.x86.cpu.i386;
+            cpu.model = &Target.x86.cpu.x86;
             return;
         },
         4 => {