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| author | Alex Rønne Petersen <alex@alexrp.com> | 2025-10-19 11:50:06 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-19 11:50:06 +0200 |
| commit | 38caa4902f87f63246d8bef9596f2cb7ad8bbbda (patch) | |
| tree | 06f9267cb6af6629221a32f858281ef5bbe946ef /lib/std/start.zig | |
| parent | c37d23f45ae6bd0db6b072180d7b84566c7dc8a2 (diff) | |
| parent | 08014589e291d9ffc8ba4d7abc9a669bfd0c3bec (diff) | |
| download | zig-38caa4902f87f63246d8bef9596f2cb7ad8bbbda.tar.gz zig-38caa4902f87f63246d8bef9596f2cb7ad8bbbda.zip | |
Merge pull request #25623 from alexrp/or1k
Add `or1k-linux` support (via CBE)
Diffstat (limited to 'lib/std/start.zig')
| -rw-r--r-- | lib/std/start.zig | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/lib/std/start.zig b/lib/std/start.zig index 318d819d2e..c6f65aae25 100644 --- a/lib/std/start.zig +++ b/lib/std/start.zig @@ -203,6 +203,7 @@ fn _start() callconv(.naked) noreturn { .loongarch32, .loongarch64 => ".cfi_undefined 1", .m68k => ".cfi_undefined %%pc", .mips, .mipsel, .mips64, .mips64el => ".cfi_undefined $ra", + .or1k => ".cfi_undefined r9", .powerpc, .powerpcle, .powerpc64, .powerpc64le => ".cfi_undefined lr", .riscv32, .riscv32be, .riscv64, .riscv64be => if (builtin.zig_backend == .stage2_riscv64) "" @@ -253,12 +254,11 @@ fn _start() callconv(.naked) noreturn { \\ b %[posixCallMainAndExit] , .arc => - // The `arc` tag currently means ARC v1 and v2, which have an unusually low stack - // alignment requirement. ARC v3 increases it from 4 to 16, but we don't support v3 yet. + // ARC v1 and v2 had a very low stack alignment requirement of 4; v3 increased it to 16. \\ mov fp, 0 \\ mov blink, 0 \\ mov r0, sp - \\ and sp, sp, -4 + \\ and sp, sp, -16 \\ b %[posixCallMainAndExit] , .arm, .armeb, .thumb, .thumbeb => @@ -306,6 +306,14 @@ fn _start() callconv(.naked) noreturn { \\ bstrins.d $sp, $zero, 3, 0 \\ b %[posixCallMainAndExit] , + .or1k => + // r1 = SP, r2 = FP, r9 = LR + \\ l.ori r2, r0, 0 + \\ l.ori r9, r0, 0 + \\ l.ori r3, r1, 0 + \\ l.andi r1, r1, -4 + \\ l.jal %[posixCallMainAndExit] + , .riscv32, .riscv32be, .riscv64, .riscv64be => \\ li fp, 0 \\ li ra, 0 |