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| author | Alex Rønne Petersen <alex@alexrp.com> | 2025-10-19 23:32:47 +0200 |
|---|---|---|
| committer | Alex Rønne Petersen <alex@alexrp.com> | 2025-10-23 09:27:17 +0200 |
| commit | 3e2daa509a897a4e10d5e6f28731b33ac2cc3dc2 (patch) | |
| tree | 6475c28a83f4b9495a4554a9bf9b06c8410dbc2f /lib/std/os/linux.zig | |
| parent | dda05b29c06731895970e75c7444f0d30c7d334f (diff) | |
| download | zig-3e2daa509a897a4e10d5e6f28731b33ac2cc3dc2.tar.gz zig-3e2daa509a897a4e10d5e6f28731b33ac2cc3dc2.zip | |
std.Target: add arceb and xtensaeb Cpu.Arch tags
Diffstat (limited to 'lib/std/os/linux.zig')
| -rw-r--r-- | lib/std/os/linux.zig | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/lib/std/os/linux.zig b/lib/std/os/linux.zig index 10feead2ae..11add50a05 100644 --- a/lib/std/os/linux.zig +++ b/lib/std/os/linux.zig @@ -116,7 +116,7 @@ pub const SECCOMP = @import("linux/seccomp.zig"); pub const syscalls = @import("linux/syscalls.zig"); pub const SYS = switch (native_arch) { - .arc => syscalls.Arc, + .arc, .arceb => syscalls.Arc, .aarch64, .aarch64_be => syscalls.Arm64, .arm, .armeb, .thumb, .thumbeb => syscalls.Arm, .csky => syscalls.CSky, @@ -141,7 +141,7 @@ pub const SYS = switch (native_arch) { .gnux32, .muslx32 => syscalls.X32, else => syscalls.X64, }, - .xtensa => syscalls.Xtensa, + .xtensa, .xtensaeb => syscalls.Xtensa, else => @compileError("The Zig Standard Library is missing syscall definitions for the target CPU architecture"), }; @@ -3686,7 +3686,7 @@ pub const PROT = struct { pub const EXEC = 0x4; /// page may be used for atomic ops pub const SEM = switch (native_arch) { - .mips, .mipsel, .mips64, .mips64el, .xtensa => 0x10, + .mips, .mipsel, .mips64, .mips64el, .xtensa, .xtensaeb => 0x10, else => 0x8, }; /// mprotect flag: extend change to start of growsdown vma @@ -6161,6 +6161,7 @@ pub fn CPU_COUNT(set: cpu_set_t) cpu_count_t { pub const MINSIGSTKSZ = switch (native_arch) { .arc, + .arceb, .arm, .armeb, .csky, @@ -6181,6 +6182,7 @@ pub const MINSIGSTKSZ = switch (native_arch) { .x86, .x86_64, .xtensa, + .xtensaeb, => 2048, .loongarch64, .sparc, @@ -6196,6 +6198,7 @@ pub const MINSIGSTKSZ = switch (native_arch) { }; pub const SIGSTKSZ = switch (native_arch) { .arc, + .arceb, .arm, .armeb, .csky, @@ -6216,6 +6219,7 @@ pub const SIGSTKSZ = switch (native_arch) { .x86, .x86_64, .xtensa, + .xtensaeb, => 8192, .aarch64, .aarch64_be, @@ -9740,6 +9744,7 @@ pub const AUDIT = struct { .armeb, .thumbeb => .ARMEB, .aarch64 => .AARCH64, .arc => .ARCV2, + .arceb => .ARCV2BE, .csky => .CSKY, .hexagon => .HEXAGON, .loongarch32 => .LOONGARCH32, |