aboutsummaryrefslogtreecommitdiff
path: root/lib/std/debug
diff options
context:
space:
mode:
authorAlex Rønne Petersen <alex@alexrp.com>2025-10-07 00:45:27 +0200
committerAlex Rønne Petersen <alex@alexrp.com>2025-10-07 16:47:57 +0200
commitfeba8a83a7c4eda738ebcf619c33ade8d0dfbfa7 (patch)
treee884fc4d0d8a7efeef1a51aa5ac19b42dfad7339 /lib/std/debug
parent9a6fad2706d05743a512c9ab5b54ba91cf5956fa (diff)
downloadzig-feba8a83a7c4eda738ebcf619c33ade8d0dfbfa7.tar.gz
zig-feba8a83a7c4eda738ebcf619c33ade8d0dfbfa7.zip
std.debug.Dwarf: use 65 as the (fake) RISC-V PC register
32-63 conflict with the floating point registers. 64 is the Alternate Frame Return Column.
Diffstat (limited to 'lib/std/debug')
-rw-r--r--lib/std/debug/Dwarf.zig2
-rw-r--r--lib/std/debug/cpu_context.zig2
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/std/debug/Dwarf.zig b/lib/std/debug/Dwarf.zig
index 64731beac3..4af4dd7f34 100644
--- a/lib/std/debug/Dwarf.zig
+++ b/lib/std/debug/Dwarf.zig
@@ -1435,7 +1435,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
.loongarch32, .loongarch64 => 64,
.mips, .mipsel, .mips64, .mips64el => 37,
.powerpc, .powerpcle, .powerpc64, .powerpc64le => 357,
- .riscv32, .riscv32be, .riscv64, .riscv64be => 32,
+ .riscv32, .riscv32be, .riscv64, .riscv64be => 65,
.s390x => 65,
.x86 => 8,
.x86_64 => 16,
diff --git a/lib/std/debug/cpu_context.zig b/lib/std/debug/cpu_context.zig
index 7760918389..5cd5360dc6 100644
--- a/lib/std/debug/cpu_context.zig
+++ b/lib/std/debug/cpu_context.zig
@@ -1018,7 +1018,7 @@ pub const Riscv = extern struct {
pub fn dwarfRegisterBytes(ctx: *Riscv, register_num: u16) DwarfRegisterError![]u8 {
switch (register_num) {
0...31 => return @ptrCast(&ctx.r[register_num]),
- 32 => return @ptrCast(&ctx.pc),
+ 65 => return @ptrCast(&ctx.pc),
else => return error.InvalidRegister,
}