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| author | Alex Rønne Petersen <alex@alexrp.com> | 2025-10-07 00:45:27 +0200 |
|---|---|---|
| committer | Alex Rønne Petersen <alex@alexrp.com> | 2025-10-07 16:47:57 +0200 |
| commit | feba8a83a7c4eda738ebcf619c33ade8d0dfbfa7 (patch) | |
| tree | e884fc4d0d8a7efeef1a51aa5ac19b42dfad7339 /lib/std/debug/cpu_context.zig | |
| parent | 9a6fad2706d05743a512c9ab5b54ba91cf5956fa (diff) | |
| download | zig-feba8a83a7c4eda738ebcf619c33ade8d0dfbfa7.tar.gz zig-feba8a83a7c4eda738ebcf619c33ade8d0dfbfa7.zip | |
std.debug.Dwarf: use 65 as the (fake) RISC-V PC register
32-63 conflict with the floating point registers. 64 is the Alternate Frame
Return Column.
Diffstat (limited to 'lib/std/debug/cpu_context.zig')
| -rw-r--r-- | lib/std/debug/cpu_context.zig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/std/debug/cpu_context.zig b/lib/std/debug/cpu_context.zig index 7760918389..5cd5360dc6 100644 --- a/lib/std/debug/cpu_context.zig +++ b/lib/std/debug/cpu_context.zig @@ -1018,7 +1018,7 @@ pub const Riscv = extern struct { pub fn dwarfRegisterBytes(ctx: *Riscv, register_num: u16) DwarfRegisterError![]u8 { switch (register_num) { 0...31 => return @ptrCast(&ctx.r[register_num]), - 32 => return @ptrCast(&ctx.pc), + 65 => return @ptrCast(&ctx.pc), else => return error.InvalidRegister, } |