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authorAlex Rønne Petersen <alex@alexrp.com>2025-10-16 13:35:30 +0200
committerAlex Rønne Petersen <alex@alexrp.com>2025-10-18 00:36:52 +0200
commitde3947608ceb6e4603e3d249fb07183e3a431536 (patch)
tree4682e6e7c3f2285d82d882197dfc12a01583ce14 /lib/std/debug/cpu_context.zig
parent81fe640dd21c1ba2d8406f4e9bb996d32f30df80 (diff)
downloadzig-de3947608ceb6e4603e3d249fb07183e3a431536.tar.gz
zig-de3947608ceb6e4603e3d249fb07183e3a431536.zip
std.debug: add CPU context and DWARF mappings for csky
Diffstat (limited to 'lib/std/debug/cpu_context.zig')
-rw-r--r--lib/std/debug/cpu_context.zig39
1 files changed, 39 insertions, 0 deletions
diff --git a/lib/std/debug/cpu_context.zig b/lib/std/debug/cpu_context.zig
index b3c348df90..eb255d20ac 100644
--- a/lib/std/debug/cpu_context.zig
+++ b/lib/std/debug/cpu_context.zig
@@ -6,6 +6,7 @@ pub const Native = if (@hasDecl(root, "debug") and @hasDecl(root.debug, "CpuCont
else switch (native_arch) {
.aarch64, .aarch64_be => Aarch64,
.arm, .armeb, .thumb, .thumbeb => Arm,
+ .csky => Csky,
.hexagon => Hexagon,
.lanai => Lanai,
.loongarch32, .loongarch64 => LoongArch,
@@ -74,6 +75,13 @@ pub fn fromPosixSignalContext(ctx_ptr: ?*const anyopaque) ?Native {
.sp = uc.mcontext.sp,
.pc = uc.mcontext.pc,
},
+ .csky => .{
+ .r = uc.mcontext.r0_13 ++
+ [_]u32{ uc.mcontext.r14, uc.mcontext.r15 } ++
+ uc.mcontext.r16_30 ++
+ [_]u32{uc.mcontext.r31},
+ .pc = uc.mcontext.pc,
+ },
.hexagon, .loongarch32, .loongarch64, .mips, .mipsel, .mips64, .mips64el, .or1k => .{
.r = uc.mcontext.r,
.pc = uc.mcontext.pc,
@@ -434,6 +442,37 @@ const Aarch64 = extern struct {
};
/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
+const Csky = extern struct {
+ /// The numbered general-purpose registers r0 - r31.
+ r: [32]u32,
+ pc: u32,
+
+ pub inline fn current() Csky {
+ var ctx: Csky = undefined;
+ asm volatile (
+ \\ stm r0-r31, (t0)
+ \\ grs t1, 1f
+ \\1:
+ \\ st32.w t1, (t0, 128)
+ :
+ : [ctx] "{r12}" (&ctx),
+ : .{ .r13 = true, .memory = true });
+ return ctx;
+ }
+
+ pub fn dwarfRegisterBytes(ctx: *Csky, register_num: u16) DwarfRegisterError![]u8 {
+ switch (register_num) {
+ 0...31 => return @ptrCast(&ctx.r[register_num]),
+ 64 => return @ptrCast(&ctx.pc),
+
+ 32...63 => return error.UnsupportedRegister, // f0 - f31
+
+ else => return error.InvalidRegister,
+ }
+ }
+};
+
+/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
const Hexagon = extern struct {
/// The numbered general-purpose registers r0 - r31.
r: [32]u32,