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authorAlex Rønne Petersen <alex@alexrp.com>2024-10-28 23:42:47 +0100
committerAlex Rønne Petersen <alex@alexrp.com>2024-11-02 10:44:14 +0100
commitbaf60426d48adbd938406f07bbbd0dfdf012943b (patch)
treed91eeacf951e05e95b166f19e878eadee35df1b6 /lib/std/Target.zig
parent20cdfe9fb6e5f54623e170b59781001dcc7e1d75 (diff)
downloadzig-baf60426d48adbd938406f07bbbd0dfdf012943b.tar.gz
zig-baf60426d48adbd938406f07bbbd0dfdf012943b.zip
std.Target: Rename amdgpu module to amdgcn.
This was an inconsistency left over from c825b567b26c475e058e074e5d22af006854fab6.
Diffstat (limited to 'lib/std/Target.zig')
-rw-r--r--lib/std/Target.zig11
1 files changed, 5 insertions, 6 deletions
diff --git a/lib/std/Target.zig b/lib/std/Target.zig
index eef52c889f..9e194c72ce 100644
--- a/lib/std/Target.zig
+++ b/lib/std/Target.zig
@@ -719,7 +719,7 @@ pub const Os = struct {
pub const aarch64 = @import("Target/aarch64.zig");
pub const arc = @import("Target/arc.zig");
-pub const amdgpu = @import("Target/amdgpu.zig");
+pub const amdgcn = @import("Target/amdgcn.zig");
pub const arm = @import("Target/arm.zig");
pub const avr = @import("Target/avr.zig");
pub const bpf = @import("Target/bpf.zig");
@@ -1591,7 +1591,6 @@ pub const Cpu = struct {
.loongarch32, .loongarch64 => "loongarch",
.mips, .mipsel, .mips64, .mips64el => "mips",
.powerpc, .powerpcle, .powerpc64, .powerpc64le => "powerpc",
- .amdgcn => "amdgpu",
.riscv32, .riscv64 => "riscv",
.sparc, .sparc64 => "sparc",
.s390x => "s390x",
@@ -1620,7 +1619,7 @@ pub const Cpu = struct {
.mips, .mipsel, .mips64, .mips64el => &mips.all_features,
.msp430 => &msp430.all_features,
.powerpc, .powerpcle, .powerpc64, .powerpc64le => &powerpc.all_features,
- .amdgcn => &amdgpu.all_features,
+ .amdgcn => &amdgcn.all_features,
.riscv32, .riscv64 => &riscv.all_features,
.sparc, .sparc64 => &sparc.all_features,
.spirv, .spirv32, .spirv64 => &spirv.all_features,
@@ -1652,7 +1651,7 @@ pub const Cpu = struct {
.mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu),
.msp430 => comptime allCpusFromDecls(msp430.cpu),
.powerpc, .powerpcle, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
- .amdgcn => comptime allCpusFromDecls(amdgpu.cpu),
+ .amdgcn => comptime allCpusFromDecls(amdgcn.cpu),
.riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
.sparc, .sparc64 => comptime allCpusFromDecls(sparc.cpu),
.spirv, .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu),
@@ -1890,7 +1889,7 @@ pub const Cpu = struct {
};
};
return switch (arch) {
- .amdgcn => &amdgpu.cpu.gfx600,
+ .amdgcn => &amdgcn.cpu.gfx600,
.arc => &arc.cpu.generic,
.arm, .armeb, .thumb, .thumbeb => &arm.cpu.generic,
.aarch64, .aarch64_be => &aarch64.cpu.generic,
@@ -1939,7 +1938,7 @@ pub const Cpu = struct {
/// `Os.Tag.freestanding`.
pub fn baseline(arch: Arch, os: Os) *const Model {
return switch (arch) {
- .amdgcn => &amdgpu.cpu.gfx906,
+ .amdgcn => &amdgcn.cpu.gfx906,
.arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline,
.aarch64 => switch (os.tag) {
.bridgeos, .driverkit, .macos => &aarch64.cpu.apple_m1,