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-rw-r--r--SOURCES/steamdeck-oled-hw-quirks.patch124
1 files changed, 124 insertions, 0 deletions
diff --git a/SOURCES/steamdeck-oled-hw-quirks.patch b/SOURCES/steamdeck-oled-hw-quirks.patch
index a4f3e57..df352d7 100644
--- a/SOURCES/steamdeck-oled-hw-quirks.patch
+++ b/SOURCES/steamdeck-oled-hw-quirks.patch
@@ -353,3 +353,127 @@ index 30e7c627f21a7..472fa2c8ebcec 100644
* Synopsys USB 3.x host HAPS platform has a class code of
--
GitLab
+
+From 32d8309584145f531b46e8c1a72c86494e72160d Mon Sep 17 00:00:00 2001
+From: Joshua Ashton <joshua@froggi.es>
+Date: Wed, 6 Sep 2023 22:00:26 +0100
+Subject: [PATCH] drm/amd/display: Don't consider vblank passed if currently in
+ vertical front porch time
+
+Changing refresh rates on OLED displays works differently to typical
+LCD panels in that instead of changing the clock, the vertical porch
+is extended significantly for lower rates.
+
+This can mean that the vertical porch can be incredibly large for
+non-base refresh rates eg. 60Hz on a 90Hz display.
+
+This isn't an issue for X11/typical compositors as their present slop
+is 1/2th of the refresh interval so the issue never manifests.
+
+However in Gamescope, the present slop very small and tuned to be
+optimal in real-time to try and reduce display latency significantly.
+This results in us queueing up the atomic commit inside the vertical
+porch region which, due to legacy X11/sync control reasons, means that
+AMDGPU must target the next vblank.
+
+This patch changes that behaviour to make FRR displays match what occurs
+on VRR/Freesync displays where the vertical porch time is not included
+in determining what vblank to target and solves the issue.
+
+This means that smarter compositors can get large input latency
+reductions when using OLED displays at lower than base refresh rates.
+
+For upstreaming this patch, it will need to be considered what the best
+solution is to enable this behaviour from the userspace side.
+Obviously the X11/legacy stuff probably cannot change here -- so we
+either need to enable this new behaviour globally for all DRM atomic
+clients (ie. basically Wayland compositors) or have a
+new DRM_MODE_ATOMIC flag.
+
+Signed-off-by: Joshua Ashton <joshua@froggi.es>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+index b87797bc5874..28e6fa8d7860 100644
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -434,7 +434,7 @@ static void dm_pflip_high_irq(void *interrupt_params)
+
+ WARN_ON(!e);
+
+- vrr_active = amdgpu_dm_crtc_vrr_active_irq(amdgpu_crtc);
++ vrr_active = true;//amdgpu_dm_crtc_vrr_active_irq(amdgpu_crtc);
+
+ /* Fixed refresh rate, or VRR scanout position outside front-porch? */
+ if (!vrr_active ||
+@@ -531,11 +531,11 @@ static void dm_vupdate_high_irq(void *interrupt_params)
+ * page-flip completion events that have been queued to us
+ * if a pageflip happened inside front-porch.
+ */
+- if (vrr_active) {
++ if (true) {
+ amdgpu_dm_crtc_handle_vblank(acrtc);
+
+ /* BTR processing for pre-DCE12 ASICs */
+- if (acrtc->dm_irq_params.stream &&
++ if (vrr_active && acrtc->dm_irq_params.stream &&
+ adev->family < AMDGPU_FAMILY_AI) {
+ spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
+ mod_freesync_handle_v_update(
+@@ -8098,7 +8098,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
+ int planes_count = 0, vpos, hpos;
+ unsigned long flags;
+ u32 target_vblank, last_flip_vblank;
+- bool vrr_active = amdgpu_dm_crtc_vrr_active(acrtc_state);
++ bool vrr_active = true;//amdgpu_dm_crtc_vrr_active(acrtc_state);
+ bool cursor_update = false;
+ bool pflip_present = false;
+ bool dirty_rects_changed = false;
+--
+GitLab
+
+From 2bfd05863fff384619dea44bafa98ba0e6a5cdf4 Mon Sep 17 00:00:00 2001
+From: Joshua Ashton <joshua@froggi.es>
+Date: Sun, 3 Dec 2023 11:35:06 +0000
+Subject: [PATCH] drm/amd/display: Revert some of the vrr always on hack
+
+Fixes frame timings on some non)-VRR external displays going all whacky.
+
+This makes us not use the late vblank irq handler (backporch line 0) and instead send the vblank event immediately on page flip when we know where the vblank is going to be.
+
+Should also improve latency/stutter on internal display potentially too.
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+index 715f442a0e3b..06dcd463f841 100644
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -434,7 +434,7 @@ static void dm_pflip_high_irq(void *interrupt_params)
+
+ WARN_ON(!e);
+
+- vrr_active = true;//amdgpu_dm_crtc_vrr_active_irq(amdgpu_crtc);
++ vrr_active = amdgpu_dm_crtc_vrr_active_irq(amdgpu_crtc);
+
+ /* Fixed refresh rate, or VRR scanout position outside front-porch? */
+ if (!vrr_active ||
+@@ -531,11 +531,11 @@ static void dm_vupdate_high_irq(void *interrupt_params)
+ * page-flip completion events that have been queued to us
+ * if a pageflip happened inside front-porch.
+ */
+- if (true) {
++ if (vrr_active) {
+ amdgpu_dm_crtc_handle_vblank(acrtc);
+
+ /* BTR processing for pre-DCE12 ASICs */
+- if (vrr_active && acrtc->dm_irq_params.stream &&
++ if (acrtc->dm_irq_params.stream &&
+ adev->family < AMDGPU_FAMILY_AI) {
+ spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags);
+ mod_freesync_handle_v_update(
+--
+GitLab