diff options
Diffstat (limited to 'SOURCES/acso.patch')
| -rw-r--r-- | SOURCES/acso.patch | 48 |
1 files changed, 23 insertions, 25 deletions
diff --git a/SOURCES/acso.patch b/SOURCES/acso.patch index a780298..424fab4 100644 --- a/SOURCES/acso.patch +++ b/SOURCES/acso.patch @@ -48,24 +48,23 @@ your customers the hassle of this boot option. Signed-off-by: Mark Weiman <mark.weiman@markzz.com> Signed-off-by: Alexandre Frade <admfrade@gmail.com> --- - .../admin-guide/kernel-parameters.txt | 9 ++ + .../admin-guide/kernel-parameters.txt | 8 ++ drivers/pci/quirks.c | 102 ++++++++++++++++++ - 2 files changed, 111 insertions(+) + 2 files changed, 110 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt -index c48937820..61e30d250 100644 +index 6cfa6e3996cf..fdbe34c0fbf3 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt -@@ -4045,6 +4045,15 @@ +@@ -4178,6 +4178,14 @@ nomsi [MSI] If the PCI_MSI kernel config parameter is enabled, this kernel boot option can be used to disable the use of MSI interrupts system-wide. -+ pcie_acs_override = -+ [PCIE] Override missing PCIe ACS support for: ++ pci_acs_override [PCIE] Override missing PCIe ACS support for: + downstream + All downstream ports - full ACS capabilities + multifunction -+ All multifunction devices - multifunction ACS subset ++ Add multifunction devices - multifunction ACS subset + id:nnnn:nnnn + Specific device - full ACS capabilities + Specified as vid:did (vendor/device ID) in hex @@ -73,12 +72,12 @@ index c48937820..61e30d250 100644 Safety option to keep boot IRQs enabled. This should never be necessary. diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c -index 41aeaa235..fcbfd845b 100644 +index 494fa46f5767..41150eb8bd4c 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c -@@ -3613,6 +3613,106 @@ static void quirk_nvidia_no_bus_reset(struct pci_dev *dev) - DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, - quirk_nvidia_no_bus_reset); +@@ -194,6 +194,106 @@ static int __init pci_apply_final_quirks(void) + } + fs_initcall_sync(pci_apply_final_quirks); +static bool acs_on_downstream; +static bool acs_on_multifunction; @@ -120,11 +119,10 @@ index 41aeaa235..fcbfd845b 100644 + goto next; + } + acs_on_ids[max_acs_id].vendor = val; -+ -+ p += strcspn(p, ":"); -+ if (*p != ':') { -+ pr_warn("PCIe ACS invalid ID\n"); -+ goto next; ++ p += strcspn(p, ":"); ++ if (*p != ':') { ++ pr_warn("PCIe ACS invalid ID\n"); ++ goto next; + } + + p++; @@ -164,7 +162,7 @@ index 41aeaa235..fcbfd845b 100644 + acs_on_ids[i].device == dev->device) + return 1; + -+ switch (pci_pcie_type(dev)) { ++switch (pci_pcie_type(dev)) { + case PCI_EXP_TYPE_DOWNSTREAM: + case PCI_EXP_TYPE_ROOT_PORT: + if (acs_on_downstream) @@ -180,18 +178,18 @@ index 41aeaa235..fcbfd845b 100644 + + return -ENOTTY; +} ++ /* - * Some Atheros AR9xxx and QCA988x chips do not behave after a bus reset. - * The device will throw a Link Down error on AER-capable systems and -@@ -4966,6 +5066,8 @@ static const struct pci_dev_acs_enabled { - { PCI_VENDOR_ID_NXP, 0x8d9b, pci_quirk_nxp_rp_acs }, - /* Zhaoxin Root/Downstream Ports */ + * Decoding should be disabled for a PCI device during BAR sizing to avoid + * conflict. But doing so may cause problems on host bridge and perhaps other +@@ -5002,6 +5102,8 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs }, -+ /* PCIe ACS overrides */ + /* Wangxun nics */ + { PCI_VENDOR_ID_WANGXUN, PCI_ANY_ID, pci_quirk_wangxun_nic_acs }, ++ /* allow acs for any */ + { PCI_ANY_ID, PCI_ANY_ID, pcie_acs_overrides }, { 0 } }; -- -2.37.0.3.g30cc8d0f14 - +2.39.2 |