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Diffstat (limited to 'SOURCES/0002-Revert-1ca399f127e0a372537625b1d462ed586f5d9139.patch')
-rw-r--r--SOURCES/0002-Revert-1ca399f127e0a372537625b1d462ed586f5d9139.patch15
1 files changed, 9 insertions, 6 deletions
diff --git a/SOURCES/0002-Revert-1ca399f127e0a372537625b1d462ed586f5d9139.patch b/SOURCES/0002-Revert-1ca399f127e0a372537625b1d462ed586f5d9139.patch
index 03ac160..00c9682 100644
--- a/SOURCES/0002-Revert-1ca399f127e0a372537625b1d462ed586f5d9139.patch
+++ b/SOURCES/0002-Revert-1ca399f127e0a372537625b1d462ed586f5d9139.patch
@@ -11,11 +11,10 @@ diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm
index 51a3130f6..ae58f24be 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
-@@ -350,35 +350,6 @@ static inline bool is_dc_timing_adjust_needed(struct dm_crtc_state *old_state,
- return false;
+@@ -358,37 +358,6 @@ static inline bool is_dc_timing_adjust_needed(struct dm_crtc_state *old_state,
}
--/**
+ /**
- * update_planes_and_stream_adapter() - Send planes to be updated in DC
- *
- * DC has a generic way to update planes and stream via
@@ -31,6 +30,8 @@ index 51a3130f6..ae58f24be 100644
- struct dc_stream_update *stream_update,
- struct dc_surface_update *array_of_surface_update)
-{
+- reverse_planes_order(array_of_surface_update, planes_count);
+-
- /*
- * Previous frame finished and HW is ready for optimization.
- */
@@ -44,10 +45,11 @@ index 51a3130f6..ae58f24be 100644
- stream_update);
-}
-
- /**
+-/**
* dm_pflip_high_irq() - Handle pageflip interrupt
* @interrupt_params: ignored
-@@ -2713,12 +2684,11 @@ static void dm_gpureset_commit_state(struct dc_state *dc_state,
+ *
+@@ -2725,12 +2694,11 @@ static void dm_gpureset_commit_state(struct dc_state *dc_state,
true;
}
@@ -65,7 +67,7 @@ index 51a3130f6..ae58f24be 100644
}
cleanup:
-@@ -8230,12 +8200,11 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
+@@ -8215,12 +8183,11 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
acrtc_state->stream->link->psr_settings.psr_allow_active)
amdgpu_dm_psr_disable(acrtc_state->stream);
@@ -83,6 +85,7 @@ index 51a3130f6..ae58f24be 100644
/**
* Enable or disable the interrupts on the backend.
+
--
2.41.0