From d6e6162081ca853c8f3cf293b559e4e6d7d2a917 Mon Sep 17 00:00:00 2001
From: joachimschmidt557 <joachim.schmidt557@outlook.com>
Date: Tue, 27 Dec 2022 21:17:52 +0800
Subject: stage2 AArch64: unify callee-preserved regs on all targets

also enables many passing behavior tests
---
 src/arch/aarch64/abi.zig  | 23 +++++++----------------
 src/arch/aarch64/bits.zig |  4 +++-
 2 files changed, 10 insertions(+), 17 deletions(-)

(limited to 'src')

diff --git a/src/arch/aarch64/abi.zig b/src/arch/aarch64/abi.zig
index 9b5cacc98e..0c48f33ea1 100644
--- a/src/arch/aarch64/abi.zig
+++ b/src/arch/aarch64/abi.zig
@@ -136,19 +136,10 @@ pub fn getFloatArrayType(ty: Type) ?Type {
     }
 }
 
-const callee_preserved_regs_impl = if (builtin.os.tag.isDarwin()) struct {
-    pub const callee_preserved_regs = [_]Register{
-        .x20, .x21, .x22, .x23,
-        .x24, .x25, .x26, .x27,
-        .x28,
-    };
-} else struct {
-    pub const callee_preserved_regs = [_]Register{
-        .x19, .x20, .x21, .x22, .x23,
-        .x24, .x25, .x26, .x27, .x28,
-    };
+pub const callee_preserved_regs = [_]Register{
+    .x19, .x20, .x21, .x22, .x23,
+    .x24, .x25, .x26, .x27, .x28,
 };
-pub const callee_preserved_regs = callee_preserved_regs_impl.callee_preserved_regs;
 
 pub const c_abi_int_param_regs = [_]Register{ .x0, .x1, .x2, .x3, .x4, .x5, .x6, .x7 };
 pub const c_abi_int_return_regs = [_]Register{ .x0, .x1, .x2, .x3, .x4, .x5, .x6, .x7 };
@@ -161,10 +152,10 @@ const RegisterBitSet = RegisterManager.RegisterBitSet;
 pub const RegisterClass = struct {
     pub const gp: RegisterBitSet = blk: {
         var set = RegisterBitSet.initEmpty();
-        set.setRangeValue(.{
-            .start = 0,
-            .end = callee_preserved_regs.len,
-        }, true);
+        for (callee_preserved_regs) |reg| {
+            const index = RegisterManager.indexOfRegIntoTracked(reg).?;
+            set.set(index);
+        }
         break :blk set;
     };
 };
diff --git a/src/arch/aarch64/bits.zig b/src/arch/aarch64/bits.zig
index 20b33c01c5..0baa7e65ce 100644
--- a/src/arch/aarch64/bits.zig
+++ b/src/arch/aarch64/bits.zig
@@ -4,13 +4,15 @@ const DW = std.dwarf;
 const assert = std.debug.assert;
 const testing = std.testing;
 
+/// Disjoint sets of registers. Every register must belong to
+/// exactly one register class.
 pub const RegisterClass = enum {
     general_purpose,
     stack_pointer,
     floating_point,
 };
 
-/// General purpose registers in the AArch64 instruction set
+/// Registers in the AArch64 instruction set
 pub const Register = enum(u8) {
     // zig fmt: off
     // 64-bit general-purpose registers
-- 
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