From 94ec2190f8d8c41d19b668511bf31fae32bcd095 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Mon, 23 Oct 2017 21:43:18 -0400 Subject: update to llvm master --- src/parsec.cpp | 3 +++ src/target.cpp | 26 +++++++++++++++++++++++++- src/zig_llvm.cpp | 8 ++++++-- src/zig_llvm.hpp | 3 +++ 4 files changed, 37 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/parsec.cpp b/src/parsec.cpp index 09f5be0fa7..01334fb24c 100644 --- a/src/parsec.cpp +++ b/src/parsec.cpp @@ -570,6 +570,8 @@ static AstNode *trans_type(Context *c, const Type *ty, const SourceLocation &sou return trans_create_node_symbol_str(c, "f64"); case BuiltinType::Float128: return trans_create_node_symbol_str(c, "f128"); + case BuiltinType::Float16: + return trans_create_node_symbol_str(c, "f16"); case BuiltinType::LongDouble: return trans_create_node_symbol_str(c, "c_longdouble"); case BuiltinType::WChar_U: @@ -856,6 +858,7 @@ static AstNode *trans_type(Context *c, const Type *ty, const SourceLocation &sou case Type::Pipe: case Type::ObjCTypeParam: case Type::DeducedTemplateSpecialization: + case Type::DependentAddressSpace: emit_warning(c, source_loc, "unsupported type: '%s'", ty->getTypeClassName()); return nullptr; } diff --git a/src/target.cpp b/src/target.cpp index de7509f4ae..6d424aaacf 100644 --- a/src/target.cpp +++ b/src/target.cpp @@ -13,6 +13,7 @@ #include static const ArchType arch_list[] = { + {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_3a}, {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_2a}, {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8_1a}, {ZigLLVM_arm, ZigLLVM_ARMSubArch_v8}, @@ -33,9 +34,30 @@ static const ArchType arch_list[] = { {ZigLLVM_arm, ZigLLVM_ARMSubArch_v5te}, {ZigLLVM_arm, ZigLLVM_ARMSubArch_v4t}, - {ZigLLVM_armeb, ZigLLVM_NoSubArch}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8_3a}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8_2a}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8_1a}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8r}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8m_baseline}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v8m_mainline}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7em}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7m}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7s}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7k}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v7ve}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v6}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v6m}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v6k}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v6t2}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v5}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v5te}, + {ZigLLVM_armeb, ZigLLVM_ARMSubArch_v4t}, + {ZigLLVM_aarch64, ZigLLVM_NoSubArch}, {ZigLLVM_aarch64_be, ZigLLVM_NoSubArch}, + {ZigLLVM_arc, ZigLLVM_NoSubArch}, {ZigLLVM_avr, ZigLLVM_NoSubArch}, {ZigLLVM_bpfel, ZigLLVM_NoSubArch}, {ZigLLVM_bpfeb, ZigLLVM_NoSubArch}, @@ -345,6 +367,7 @@ void resolve_target_object_format(ZigTarget *target) { case ZigLLVM_amdil: case ZigLLVM_amdil64: case ZigLLVM_armeb: + case ZigLLVM_arc: case ZigLLVM_avr: case ZigLLVM_bpfeb: case ZigLLVM_bpfel: @@ -407,6 +430,7 @@ static int get_arch_pointer_bit_width(ZigLLVM_ArchType arch) { case ZigLLVM_msp430: return 16; + case ZigLLVM_arc: case ZigLLVM_arm: case ZigLLVM_armeb: case ZigLLVM_hexagon: diff --git a/src/zig_llvm.cpp b/src/zig_llvm.cpp index 0e1a067bc6..074fa4c712 100644 --- a/src/zig_llvm.cpp +++ b/src/zig_llvm.cpp @@ -37,7 +37,7 @@ #include #include -#include +#include using namespace llvm; @@ -605,11 +605,13 @@ static_assert((Triple::ArchType)ZigLLVM_LastArchType == Triple::LastArchType, "" static_assert((Triple::VendorType)ZigLLVM_LastVendorType == Triple::LastVendorType, ""); static_assert((Triple::OSType)ZigLLVM_LastOSType == Triple::LastOSType, ""); static_assert((Triple::EnvironmentType)ZigLLVM_LastEnvironmentType == Triple::LastEnvironmentType, ""); +static_assert((Triple::SubArchType)ZigLLVM_KalimbaSubArch_v5 == Triple::KalimbaSubArch_v5, ""); static_assert((Triple::ObjectFormatType)ZigLLVM_UnknownObjectFormat == Triple::UnknownObjectFormat, ""); static_assert((Triple::ObjectFormatType)ZigLLVM_COFF == Triple::COFF, ""); static_assert((Triple::ObjectFormatType)ZigLLVM_ELF == Triple::ELF, ""); static_assert((Triple::ObjectFormatType)ZigLLVM_MachO == Triple::MachO, ""); +static_assert((Triple::ObjectFormatType)ZigLLVM_Wasm == Triple::Wasm, ""); const char *ZigLLVMGetArchTypeName(ZigLLVM_ArchType arch) { return (const char*)Triple::getArchTypeName((Triple::ArchType)arch).bytes_begin(); @@ -648,6 +650,8 @@ const char *ZigLLVMGetSubArchTypeName(ZigLLVM_SubArchType sub_arch) { switch (sub_arch) { case ZigLLVM_NoSubArch: return "(none)"; + case ZigLLVM_ARMSubArch_v8_3a: + return "v8_3a"; case ZigLLVM_ARMSubArch_v8_2a: return "v8_2a"; case ZigLLVM_ARMSubArch_v8_1a: @@ -775,7 +779,7 @@ bool ZigLLDLink(ZigLLVM_ObjectFormatType oformat, const char **args, size_t arg_ zig_unreachable(); case ZigLLVM_COFF: - return lld::coff::link(array_ref_args); + return lld::coff::link(array_ref_args, false); case ZigLLVM_ELF: return lld::elf::link(array_ref_args, false, diag); diff --git a/src/zig_llvm.hpp b/src/zig_llvm.hpp index e8df900a10..8c05b60d16 100644 --- a/src/zig_llvm.hpp +++ b/src/zig_llvm.hpp @@ -177,6 +177,7 @@ enum ZigLLVM_ArchType { ZigLLVM_armeb, // ARM (big endian): armeb ZigLLVM_aarch64, // AArch64 (little endian): aarch64 ZigLLVM_aarch64_be, // AArch64 (big endian): aarch64_be + ZigLLVM_arc, // ARC: Synopsys ARC ZigLLVM_avr, // AVR: Atmel AVR microcontroller ZigLLVM_bpfel, // eBPF or extended BPF or 64-bit BPF (little endian) ZigLLVM_bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian) @@ -229,6 +230,7 @@ enum ZigLLVM_ArchType { enum ZigLLVM_SubArchType { ZigLLVM_NoSubArch, + ZigLLVM_ARMSubArch_v8_3a, ZigLLVM_ARMSubArch_v8_2a, ZigLLVM_ARMSubArch_v8_1a, ZigLLVM_ARMSubArch_v8, @@ -318,6 +320,7 @@ enum ZigLLVM_EnvironmentType { ZigLLVM_UnknownEnvironment, ZigLLVM_GNU, + ZigLLVM_GNUABIN32, ZigLLVM_GNUABI64, ZigLLVM_GNUEABI, ZigLLVM_GNUEABIHF, -- cgit v1.2.3