From 35eaaed7c4fa5ca16c3a593e2bb479163e4c56d8 Mon Sep 17 00:00:00 2001 From: mparadinha Date: Fri, 18 Mar 2022 19:38:06 +0000 Subject: stage2: x86_64: use correct register size when loading things from memory --- src/arch/x86_64/CodeGen.zig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/arch/x86_64/CodeGen.zig b/src/arch/x86_64/CodeGen.zig index 65b7b73f39..70f644b9c7 100644 --- a/src/arch/x86_64/CodeGen.zig +++ b/src/arch/x86_64/CodeGen.zig @@ -953,7 +953,8 @@ pub fn spillCompareFlagsIfOccupied(self: *Self) !void { /// This can have a side effect of spilling instructions to the stack to free up a register. fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register { const reg = try self.register_manager.allocReg(null); - try self.genSetReg(ty, reg, mcv); + const sized_reg = registerAlias(reg, @intCast(u32, ty.abiSize(self.target.*))); + try self.genSetReg(ty, sized_reg, mcv); return reg; } @@ -5337,7 +5338,7 @@ fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void _ = try self.addInst(.{ .tag = .mov, .ops = (Mir.Ops{ - .reg1 = reg.to64(), + .reg1 = reg, .reg2 = reg.to64(), .flags = 0b01, }).encode(), -- cgit v1.2.3