From bdbedff910e18e18dc31db84a80607435e9b6ee0 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Wed, 29 Sep 2021 15:33:45 -0700
Subject: stage2: LLVM backend: properly set module target data

Also fix tripping LLVM assert having to do with 0 bit integers.
stage2 behavior tests now run clean in a debug build of llvm 12.
---
 src/type.zig | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/type.zig')

diff --git a/src/type.zig b/src/type.zig
index cd7eb7a7d0..dacde84167 100644
--- a/src/type.zig
+++ b/src/type.zig
@@ -3868,6 +3868,7 @@ pub const Type = extern union {
     };
 
     pub const @"bool" = initTag(.bool);
+    pub const @"usize" = initTag(.usize);
     pub const @"comptime_int" = initTag(.comptime_int);
 
     pub fn ptr(arena: *Allocator, d: Payload.Pointer.Data) !Type {
-- 
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