From a31a749c42505e53308c0f2426db283ea130e776 Mon Sep 17 00:00:00 2001 From: Veikka Tuominen Date: Wed, 19 Jan 2022 12:26:30 +0200 Subject: stage1: add f80 type --- src/stage1/target.cpp | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'src/stage1/target.cpp') diff --git a/src/stage1/target.cpp b/src/stage1/target.cpp index feb2c7f143..a505b4bd21 100644 --- a/src/stage1/target.cpp +++ b/src/stage1/target.cpp @@ -1019,6 +1019,17 @@ bool target_long_double_is_f128(const ZigTarget *target) { } } +bool target_has_f80(const ZigTarget *target) { + switch (target->arch) { + case ZigLLVM_x86: + case ZigLLVM_x86_64: + return true; + + default: + return false; + } +} + bool target_is_riscv(const ZigTarget *target) { return target->arch == ZigLLVM_riscv32 || target->arch == ZigLLVM_riscv64; } -- cgit v1.2.3