From 6fde2fcd519cacdc44871fc1035b05afee072f44 Mon Sep 17 00:00:00 2001 From: Andrew Kelley Date: Sun, 8 May 2022 13:05:16 -0700 Subject: allow in-memory coercion of differently-named floats with same bits For example, this allows passing a `*c_longdouble` where a `*f80` is expected, provided that `c_longdouble` maps to `f80` for this target. --- src/stage1/ir.cpp | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/stage1/ir.cpp') diff --git a/src/stage1/ir.cpp b/src/stage1/ir.cpp index f7ab5e12fa..ee195680cd 100644 --- a/src/stage1/ir.cpp +++ b/src/stage1/ir.cpp @@ -4480,6 +4480,12 @@ static ConstCastOnly types_match_const_cast_only(IrAnalyze *ira, ZigType *wanted return result; } + if (wanted_type->id == ZigTypeIdFloat && actual_type->id == ZigTypeIdFloat) { + if (wanted_type->data.floating.bit_count == actual_type->data.floating.bit_count) { + return result; + } + } + if (wanted_type->id == ZigTypeIdVector && actual_type->id == ZigTypeIdVector) { if (actual_type->data.vector.len != wanted_type->data.vector.len) { result.id = ConstCastResultIdVectorLength; -- cgit v1.2.3