From fb7060d3c2e8ce4d7de5560adf8ec4a26fc5f6e8 Mon Sep 17 00:00:00 2001
From: Andrew Kelley <andrew@ziglang.org>
Date: Sun, 30 Jan 2022 16:23:31 -0700
Subject: stage2: implement shl_exact and shr_exact

These produce an undefined value when one bits are shifted out.

New AIR instruction: shr_exact.
---
 src/arch/wasm/CodeGen.zig | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

(limited to 'src/arch/wasm/CodeGen.zig')

diff --git a/src/arch/wasm/CodeGen.zig b/src/arch/wasm/CodeGen.zig
index b58bc81f14..d86e0069cf 100644
--- a/src/arch/wasm/CodeGen.zig
+++ b/src/arch/wasm/CodeGen.zig
@@ -1442,8 +1442,8 @@ fn genInst(self: *Self, inst: Air.Inst.Index) !WValue {
         .bool_and => self.airBinOp(inst, .@"and"),
         .bool_or => self.airBinOp(inst, .@"or"),
         .rem => self.airBinOp(inst, .rem),
-        .shl => self.airBinOp(inst, .shl),
-        .shr => self.airBinOp(inst, .shr),
+        .shl, .shl_exact => self.airBinOp(inst, .shl),
+        .shr, .shr_exact => self.airBinOp(inst, .shr),
         .xor => self.airBinOp(inst, .xor),
 
         .cmp_eq => self.airCmp(inst, .eq),
@@ -1531,7 +1531,6 @@ fn genInst(self: *Self, inst: Air.Inst.Index) !WValue {
         .max,
         .min,
         .assembly,
-        .shl_exact,
         .shl_sat,
         .ret_addr,
         .clz,
-- 
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