From 0a5c088ecc2fbe4db5cae1cc5cf62eeba340375d Mon Sep 17 00:00:00 2001
From: Alex Rønne Petersen <alex@alexrp.com>
Date: Mon, 7 Apr 2025 18:30:44 +0200
Subject: compiler: Add hexagon-linux-musl support.

Closes #21588.
---
 lib/std/zig/target.zig | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'lib/std')

diff --git a/lib/std/zig/target.zig b/lib/std/zig/target.zig
index a08ce22388..2574f26d18 100644
--- a/lib/std/zig/target.zig
+++ b/lib/std/zig/target.zig
@@ -34,6 +34,7 @@ pub const available_libcs = [_]ArchOsAbi{
     .{ .arch = .aarch64_be, .os = .linux, .abi = .musl, .os_ver = .{ .major = 3, .minor = 13, .patch = 0 } },
     .{ .arch = .csky, .os = .linux, .abi = .gnueabi, .os_ver = .{ .major = 4, .minor = 20, .patch = 0 }, .glibc_min = .{ .major = 2, .minor = 29, .patch = 0 }, .glibc_triple = "csky-linux-gnuabiv2-soft" },
     .{ .arch = .csky, .os = .linux, .abi = .gnueabihf, .os_ver = .{ .major = 4, .minor = 20, .patch = 0 }, .glibc_min = .{ .major = 2, .minor = 29, .patch = 0 }, .glibc_triple = "csky-linux-gnuabiv2" },
+    .{ .arch = .hexagon, .os = .linux, .abi = .musl, .os_ver = .{ .major = 3, .minor = 2, .patch = 102 } },
     .{ .arch = .loongarch64, .os = .linux, .abi = .gnu, .os_ver = .{ .major = 5, .minor = 19, .patch = 0 }, .glibc_min = .{ .major = 2, .minor = 36, .patch = 0 }, .glibc_triple = "loongarch64-linux-gnu-lp64d" },
     .{ .arch = .loongarch64, .os = .linux, .abi = .gnusf, .os_ver = .{ .major = 5, .minor = 19, .patch = 0 }, .glibc_min = .{ .major = 2, .minor = 36, .patch = 0 }, .glibc_triple = "loongarch64-linux-gnu-lp64s" },
     .{ .arch = .loongarch64, .os = .linux, .abi = .musl, .os_ver = .{ .major = 5, .minor = 19, .patch = 0 } },
@@ -154,6 +155,7 @@ pub fn muslArchName(arch: std.Target.Cpu.Arch, abi: std.Target.Abi) [:0]const u8
         else => switch (arch) {
             .arm, .armeb, .thumb, .thumbeb => "arm",
             .aarch64, .aarch64_be => "aarch64",
+            .hexagon => "hexagon",
             .loongarch64 => "loongarch64",
             .m68k => "m68k",
             .mips, .mipsel => "mips",
-- 
cgit v1.2.3


From 01b5e8b296e0b68f8bc90b3779e1543e3e14a8ed Mon Sep 17 00:00:00 2001
From: Alex Rønne Petersen <alex@alexrp.com>
Date: Mon, 7 Apr 2025 18:15:31 +0200
Subject: std: Disable some vector-related tests for hexagon.

See:

* https://github.com/llvm/llvm-project/issues/118879
* https://github.com/llvm/llvm-project/issues/134659
---
 lib/std/mem.zig  | 4 +++-
 lib/std/simd.zig | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

(limited to 'lib/std')

diff --git a/lib/std/mem.zig b/lib/std/mem.zig
index 2363fe125e..e5194ad93b 100644
--- a/lib/std/mem.zig
+++ b/lib/std/mem.zig
@@ -431,7 +431,9 @@ test zeroes {
     }
     try testing.expectEqual(@as(@TypeOf(b.vector_u32), @splat(0)), b.vector_u32);
     try testing.expectEqual(@as(@TypeOf(b.vector_f32), @splat(0.0)), b.vector_f32);
-    try testing.expectEqual(@as(@TypeOf(b.vector_bool), @splat(false)), b.vector_bool);
+    if (!(builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon)) {
+        try testing.expectEqual(@as(@TypeOf(b.vector_bool), @splat(false)), b.vector_bool);
+    }
     try testing.expectEqual(@as(?u8, null), b.optional_int);
     for (b.sentinel) |e| {
         try testing.expectEqual(@as(u8, 0), e);
diff --git a/lib/std/simd.zig b/lib/std/simd.zig
index b4aef7246c..a07f58ec8a 100644
--- a/lib/std/simd.zig
+++ b/lib/std/simd.zig
@@ -464,6 +464,7 @@ test "vector prefix scan" {
     if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
     if ((builtin.cpu.arch == .armeb or builtin.cpu.arch == .thumbeb) and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/22060
     if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest; // https://github.com/ziglang/zig/issues/21893
+    if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .hexagon) return error.SkipZigTest;
 
     if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
 
-- 
cgit v1.2.3